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fujitsu microelectronics data sheet copyright?2008-2009 fujitsu microelec tronics limited all rights reserved 2009.8 for the information for microcontrolle r supports, see the following web site. this web site includes the "customer design review supplement" which provides the latest cautions on system development and the minimal requirements to be checked to prevent problems before the system development. http://edevice.fujitsu.com/micom/en-support/ 32-bit microcontrollers cmos fr80 mb91610 series MB91F610A/613 description the mb91610 series is a line of fujitsu microelectronic s microcontrollers based on a 32-bit risc cpu core that feature a variety of peripheral functions for embedded a pplications that demand high-performance and high-speed cpu processing. this series is based on the fr80* family cpu and is implemented as a single chip. * : fr, the abbreviation of fujitsu risc controller, is a line of products of fujitsu microelectronics limited. features ? fr80 cpu ? 32-bit risc, load/store architecture, five-stage pipeline ? general-purpose registers : 32-bit 16 ? 16-bit fixed-length instructions (basic instructions) : 1 instruction per cycle ? instructions suitable for embedded applications - memory-to-memory transfer, bit proc essing, barrel shift instructions, etc. - instruction support for high level languages function entry and exit instructions, instructi ons for register multi-load and multi-store - bit search instruction ?1? detection, ?0? detection, transition point detection - branch instructions with delay slots reduced overhead when processing branches - register interlock functions facilitate coding in assembly language (continued) ds07-16907-2e
mb91610 series 2 ds07-16907-2e - built-in multiplier/in struction-level support - signed 32-bit multiplication : 5 cycles - signed 16-bit multiplication : 3 cycles - interrupts (save pc and ps) : 6 cycles, 16 priority levels - harvard architecture allowing program access and data access to be executed simultaneously - instruction prefetch function has been added with 4 word instruction queue of cpu ? instruction compatible with fr family cpu - additional bit search instructions - no resource instructions and coprocessor instructions ? maximum operating frequency ? cpu : 33 mhz ? resources : 33 mhz ? dma controller (dmac) ? 8 channels ? address space : 32 bits (4 gbytes) ? transfer modes : block transfer/burst transfer/demand transfer ? address update : increment/decrement/fixed (incre ment/decrement step size of 1, 2, or 4) ? transfer data length : selectable from 8-bit, 16-bit, 32-bit ? block size : 1 to 16 ? number of transfers : 1 to 65535 ? transfer requests - requests from software - interrupt requests from peripheral resources (interrupt requests are shared, including external interrupts) ? reload functions : reload can be specified on all channels ? priority order : fixed (ch.0 > ch.1 > ch.2 > ch.3 > ...) or round-robin ? interrupt requests : interrupts can be generated for transfer complete, transfer error, and transfer interrupted. ? multifunction serial interface ? 4 channels with 16-byte fifo, 4 channels without fifo ? operation mode is selectable from uart/csio/i 2 c for each channel (for ch.0, i 2 c is not available.) ? uart - full-duplex double buffer - selectable parity on/off - built-in dedicated baud rate generator - external clock can be used as a serial clock - error detection function for parity, frame and overrun errors ? csio - full-duplex double buffer - built-in dedicated baud rate generator - overrun error detection function ? i 2 c - supports both standard mode (max 100 kb ps) and fast mode (max 400 kbps) - some channels are 5 v tolerant (continued)
mb91610 series ds07-16907-2e 3 ? interrupts ? total of 16 external interrupts (some pins are 5 v tolerant) ? interrupts from peripheral resources ? programmable interrupt levels (16 levels) ? can be used to return from stop mode, sleep mode ? a/d converter ? 8 channels, 1 unit ? 10-bit resolution ? conversion time : approx. 1.2 s (pclk = 33 mhz) ? priority conversion (2 levels) ? conversion modes : single-shot co nversion mode, scan conversion mode ? activation sources : software, external trigger, base timer ? built-in fifo for storing conversion data (for scan conversion:16, for priority conversion:4) ? base timer ? 8 channels ? operation mode is selectable from the followings for each channel - 16/32-bit reload timer - 16-bit pwm timer - 16/32-bit pwc timer - 16-bit ppg timer ? cascading connection between 2 channels allo ws them to be used as one 32-bit timer ? multiple channels can be started simultaneously ? input/output select function ? 16-bit reload timer ? 3 channels (including 1 channel for realos) ? interval timer function ? count clock select function (peripheral clock (pclk) divided by 2 to 64) ? compare timer ? 32-bit input capture : 4 channels ? 32-bit output compare : 4 channels ? 32-bit free-run timer : 1 channel ? other interval timers ? watch counter : 1 channel ? watchdog timer : 2 channels - watchdog timer 0 - after resetting this device, the watchdog timer become s active when an arbitrary value is written to the wdtcpr0 register. - the cycle of the watchdog timer 0 can be selected from the peripheral clock (pclk) (2 9 to 2 24 ). - watchdog timer 1 - after releasing the reset of this device , it counts with the cpu clock (cclk). - disable/ enable of the counter oper ation can be controlled by hwde pin. - the cycle of the watchdog timer 1 is cclk 2 23 cycle fixed. (continued)
mb91610 series 4 ds07-16907-2e ? usb function / host ? 1 channel ? supports full-speed only ? the usb function and usb host are t he switch types (usb i/o multiplexed) ? support of dma transfer ? usb function - support of up to six endpoints - endpoint 0 is provided for the fixed use of control transfers - bulk or interrupt transfer ca n be selected for endpoint 1 to 5 - double buffer structure for endpoint 1 to 5 ? usb host - support control transfer, bulk transfer, interrupt transfer, and isochronous transfer - automatic detection of connecti on/disconnection of usb devices - automatic processing of a handshake packet for in/out token processing - support of a maximum packet length of up to 256 bytes - support for a wakeup function ? hdmi-cec/remote control reception ? 1 channel ? hdmi-cec reception function (with automatic ack response function) ? remote control reception function (built-in 4-byte receive buffer) ? osdc function ? 16 bits rgb (256 colors available among 65536 colors) ? analog rgb output : max 50 mhz digital rgb output : max 75 mhz ? a font in 32 32 dots can be displayed up to 60 32 ? two-layered display of main/sub ? 16384 characters at the maximum ? equipped with one pll for dot clock generation ? main timer ? 1 channel ? counts the oscillation stabilization wait time of the main clock (mclk) ? counts the oscillation stabilization wait time of the pll clock (pllclk) ? can be used as an interval timer while t he main clock (mclk) oscillations is stable ? sub timer ? 1 channel ? counts the oscillation stabilization wait time of the sub clock (sbclk) ? can be used as an interval timer while the sub clock (sbclk) oscillations is stable ? clock generation ? main clock (mclk) oscillator ? sub clock (sbclk) oscillator ? pll clock (pllclk) oscillator (continued)
mb91610 series ds07-16907-2e 5 (continued) ? low-power dissipation mode ? stop mode ? watch mode ? sleep mode ? doze mode ? clock division function ? other features ? i/o port ? init pin is provided as a reset pin ? watchdog timer reset, software reset ? delay interrupt ? power supply - single power supply (3.0 v to 3.6 v)
mb91610 series 6 ds07-16907-2e product lineup packages : supported note: refer to ? package dimensions? for detailed information on each package. product name items MB91F610A mb91613 product type flash memory product mask rom product built-in program memory capacity 512 kbytes (flash) 512 kbytes (rom) built-in ram capacity 32 kbytes dma controller (dmac) 8 channels base timer 8 channels multifunction serial interface without fifo : 4 channels (ch.0 to ch.3) with fifo : 4 channels (ch.8 to ch.11) external interrupt 16 channels 10-bit a/d converter 8 channels (1 unit) 16-bit reload timer 3 channels compare timer 32-bit input capture : 4 channels 32-bit output compare : 4 channels 32-bit free-run timer : 1 channel watch counter 1 channel i/o port 50 (max) usb function / host 1 channel hdmi-cec/remote control reception 1 channel osdc font flash : 16384 characters font rom : 7168 characters main timer 1 channel sub timer 1 channel wild register 16 channels debug function dsu4 ? product name package MB91F610A mb91613 fpt-120p-m21
mb91610 series ds07-16907-2e 7 pin assignment (top view) (fpt-120p-m21) * : n.c. pin for mb91613. note : the number after the underscor e (?_?) in pin names such as xxx_1 and xxx_2 indicates the port number. for these pins, there are multiple pins that prov ide the same function for the same channel. use the extended port function register (epfr) to select the pin. lqfp-120 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 v ss v cc ics2* ics1* ics0* ibreak* iclk* trst* avrh av ss av cc p77/an7/sck0/tmi2 p76/an6/sin0/tmi1 p75/an5/sout0/tmi0 p74/an4/tmo2 p73/an3/tmo1/out3_1 p72/an2/tmo0/out2_1 p71/an1/out1_1 p70/an0/out0_1 init md0 md1 x0 x1 v ss pk0/x1a pk1/x0a hwde v cc v ss 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 v ss p27/out3 p26/sck9/out2 p25/sin9/out1 p24/sout9/out0 p23/rcin_1 p22/sck8 p21/sin8 p20/sout8 p17/tiob7/int7 p16/tioa7/ sck3/int6 p15/tiob6/sin3/int5 p14/tioa6/ sout3/int4 p13/tiob5/int3 p12/tioa5/ sck2/int2 p11/tiob4/sin2/int1 p10/tioa4/ sout2/int0 p07/tiob3 p06/tioa 3/sck1 p05/tiob2/sin1 p04/tioa2/ sout1 p03/tiob1/in3 p02/tioa1/ sck0_1/in2 p01/tiob0/sin0_1/in1 p00/tioa0/ sout0_1/in0 icd3* icd2* icd1* icd0* c 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 v ss b0 b1 b2 b3 b4 voa0 voa1 voa2 vob dcko dcki vsync hsync vssp vddp vci cpo vssd vddd vref vro rout gout bout v cc udp udm v ss c v cc p30/sout10/int8 p31/sin10/int9 p32/sck10/int10 p33/int11 p34/sout11/int12 p35/sin11/int13 p36/sck11/int14 p37/int15 p50 p51 p52 p53 p54/rcin p55/adtrg p56/frck p57 v ss r0 r1 r2 r3 r4 g0 g1 g2 g3 g4 g5 v cc
mb91610 series 8 ds07-16907-2e pin description the number after the underscore (?_?) in pin names such as xxx_1 and xxx_2 indicates the port number. for these pins, there are multiple pins that provide the same function for the same channel. use the extended port function register (epfr) to select the pin. (continued) pin no. pin name i/o circuit type* function 1v cc ? 3.3 v power supply 2 p30 c general-purpose i/o port sout10 multifunction serial ch.10 output [operation modes 0 to 2] (sda10) i 2 c ch.10 serial data line [operation mode 4] int8 external interrupt 8 input 3 p31 c general-purpose i/o port sin10 multifunction serial ch.10 input int9 external interrupt 9 input 4 p32 c general-purpose i/o port sck10 multifunction serial ch.10 clock [operation modes 0 to 2] (scl10) i 2 c ch.10 serial clock line [operation mode 4] int10 external interrupt 10 input 5 p33 c general-purpose i/o port int11 external interrupt 11 input 6 p34 c general-purpose i/o port sout11 multifunction serial ch.11 output [operation modes 0 to 2] (sda11) i 2 c ch.11 serial data line [operation mode 4] int12 external interrupt 12 input 7 p35 c general-purpose i/o port sin11 multifunction serial ch.11 input int13 external interrupt 13 input 8 p36 c general-purpose i/o port sck11 multifunction serial ch.11 clock [operation modes 0 to 2] (scl11) i 2 c ch.11 serial clock line [operation mode 4] int14 external interrupt 14 input 9 p37 c general-purpose i/o port int15 external interrupt 15 input 10 p50 b general-purpose i/o port 11 p51 b general-purpose i/o port
mb91610 series ds07-16907-2e 9 (continued) pin no. pin name i/o circuit type* function 12 p52 b general-purpose i/o port 13 p53 b general-purpose i/o port 14 p54 b general-purpose i/o port rcin remote control i/o 15 p55 b general-purpose i/o port adtrg a/d converter external trigger input 16 p56 b general-purpose i/o port frck free-run timer clock input 17 p57 b general-purpose i/o port 18 v ss ? gnd 19 r0 h rgb digital output 20 r1 h rgb digital output 21 r2 h rgb digital output 22 r3 h rgb digital output 23 r4 h rgb digital output 24 g0 h rgb digital output 25 g1 h rgb digital output 26 g2 h rgb digital output 27 g3 h rgb digital output 28 g4 h rgb digital output 29 g5 h rgb digital output 30 v cc ? 3.3v power supply 31 v ss ? gnd 32 b0 h rgb digital output 33 b1 h rgb digital output 34 b2 h rgb digital output 35 b3 h rgb digital output 36 b4 h rgb digital output 37 voa0 h alpha blend output 38 voa1 h alpha blend output 39 voa2 h alpha blend output
mb91610 series 10 ds07-16907-2e (continued) pin no. pin name i/o circuit type* function 40 vob h osd display period output 41 dcko h dot clock output 42 dcki f dot clock input 43 vsync f vertical synchronous input 44 hsync f horizontal synchronous input 45 vssp ? dot clock pll ground 46 vddp ? dot clock pll power supply 47 vci ? vco control voltage input 48 cpo m charge pump output 49 vssd ? rgb analog output gnd 50 vddd ? rgb analog output power supply 51 vref m rgb analog output reference power supply 52 vro m rgb analog output resistance connected pin 53 rout m r output (analog) 54 gout m g output (analog) 55 bout m b output (analog) 56 v cc ? 3.3 v power supply 57 udp usb usb pin 58 udm usb usb pin 59 v ss ? gnd 60 c ? c pin for a regulator 61 v ss ? gnd 62 v cc ? 3.3 v power supply 63 hwde f hardware watchdog enable input 64 pk1 g general-purpose i/o port x0a 32khz oscillation pin 65 pk0 g general-purpose i/o port x1a 32 khz oscillation pin 66 v ss ? gnd 67 x1 a main oscillation pin 68 x0 a main oscillation pin
mb91610 series ds07-16907-2e 11 (continued) pin no. pin name i/o circuit type* function 69 md1 f, l mode pin 70 md0 f, l mode pin 71 init f, l initial (reset) pin 72 p70 d general-purpose i/o port an0 a/d converter ch.0 analog input out0_1 output compare ch.0 output (port 1) 73 p71 d general-purpose i/o port an1 a/d converter ch.1 analog input out1_1 output compare ch.1 output (port 1) 74 p72 d general-purpose i/o port an2 a/d converter ch.2 analog input tmo0 reload timer ch.0 output out2_1 output compare ch.2 output (port 1) 75 p73 d general-purpose i/o port an3 a/d converter ch.3 analog input tmo1 reload timer ch.1 output out3_1 output compare ch.3 output (port 1) 76 p74 d general-purpose i/o port an4 a/d converter ch.4 analog input tmo2 reload timer ch.2 output 77 p75 d general-purpose i/o port an5 a/d converter ch.5 analog input sout0 multifunction serial ch.0 output [operation modes 0 to 2] tmi0 reload timer ch.0 input 78 p76 d general-purpose i/o port an6 a/d converter ch.6 analog input sin0 multifunction serial ch.0 input tmi1 reload timer ch.1 input
mb91610 series 12 ds07-16907-2e (continued) pin no. pin name i/o circuit type* function 79 p77 d general-purpose i/o port an7 a/d converter ch.7 analog input sck0 multifunction serial ch.0 clock [operation modes 0 to 2] tmi2 reload timer ch.2 input 80 av cc ? a/d converter analog power supply 81 av ss ? a/d converter gnd 82 avrh ? a/d converter analog reference power supply 83 trst e tool reset input for dsu4 n.c. pin for mask products. 84 iclk k clock pin for dsu4 n.c. pin for mask products. 85 ibreak i break pin for dsu4 n.c. pin for mask products. 86 ics0 h dsu4 status n.c. pin for mask products. 87 ics1 h dsu4 status n.c. pin for mask products. 88 ics2 h dsu4 status n.c. pin for mask products. 89 v cc ? 3.3 v power supply 90 v ss ? gnd 91 c ? c pin for a regulator 92 icd0 j dsu4 data n.c. pin for mask products. 93 icd1 j dsu4 data n.c. pin for mask products. 94 icd2 j dsu4 data n.c. pin for mask products. 95 icd3 j dsu4 data n.c. pin for mask products. 96 p00 b general-purpose i/o port tioa0 base timer ch.0 tioa sout0_1 multifunction serial ch.0 output (port 1) [operation modes 0 to 2] in0 input capture ch.0 input
mb91610 series ds07-16907-2e 13 (continued) pin no. pin name i/o circuit type* function 97 p01 b general-purpose i/o port tiob0 base timer ch.0 tiob sin0_1 multifunction serial ch.0 input (port 1) in1 input capture ch.1 input 98 p02 b general-purpose i/o port tioa1 base timer ch.1 tioa sck0_1 multifunction serial ch.0 cloc k (port 1) [operation modes 0 to 2] in2 input capture ch.2 input 99 p03 b general-purpose i/o port tiob1 base timer ch.1 tiob in3 input capture ch.3 input 100 p04 b general-purpose i/o port tioa2 base timer ch.2 tioa sout1 multifunction serial ch.1 output [operation modes 0 to 2] (sda1) i 2 c ch.1 serial data line [operation mode 4] 101 p05 b general-purpose i/o port tiob2 base timer ch.2 tiob sin1 multifunction serial ch.1 input 102 p06 b general-purpose i/o port tioa3 base timer ch.3 tioa sck1 multifunction serial ch.1 clock [operation modes 0 to 2] (scl1) i 2 c ch.1 serial clock line [operation mode 4] 103 p07 b general-purpose i/o port tiob3 base timer ch.3 tiob 104 p10 b general-purpose i/o port tioa4 base timer ch.4 tioa sout2 multifunction serial ch.2 output [operation modes 0 to 2] (sda2) i 2 c ch.2 serial data line [operation mode 4] int0 external interrupt 0 input
mb91610 series 14 ds07-16907-2e (continued) pin no. pin name i/o circuit type* function 105 p11 b general-purpose i/o port tiob4 base timer ch.4 tiob sin2 multifunction serial ch.2 input int1 external interrupt 1 input 106 p12 b general-purpose i/o port tioa5 base timer ch.5 tioa sck2 multifunction serial ch.2 clock [operation modes 0 to 2] (scl2) i 2 c ch.2 serial clock line [operation mode 4] int2 external interrupt 2 input 107 p13 b general-purpose i/o port tiob5 base timer ch.5 tiob int3 external interrupt 3 input 108 p14 b general-purpose i/o port tioa6 base timer ch.6 tioa sout3 multifunction serial ch.3 output [operation modes 0 to 2] (sda3) i 2 c ch.3 serial data line [operation mode 4] int4 external interrupt 4 input 109 p15 b general-purpose i/o port tiob6 base timer ch.6 tiob sin3 multifunction serial ch.3 input int5 external interrupt 5 input 110 p16 b general-purpose i/o port tioa7 base timer ch.7 tioa sck3 multifunction serial ch.3 clock [operation modes 0 to 2] (scl3) i 2 c ch.3 serial clock line [operation mode 4] int6 external interrupt 6 input 111 p17 b general-purpose i/o port tiob7 base timer ch.7 tiob int7 external interrupt 7 input 112 p20 c general-purpose i/o port sout8 multifunction serial ch.8 output [operation modes 0 to 2] (sda8) i 2 c ch.8 serial data line [operation mode 4]
mb91610 series ds07-16907-2e 15 (continued) * : refer to ? i/o circuit type? for details on the i/o circuit types. pin no. pin name i/o circuit type* function 113 p21 c general-purpose i/o port sin8 multifunction serial ch.8 input 114 p22 c general-purpose i/o port sck8 multifunction serial ch.8 clock [operation modes 0 to 2] (scl8) i 2 c ch.8 serial clock line [operation mode 4] 115 p23 c general-purpose i/o port rcin_1 remote control i/o (1) 116 p24 c general-purpose i/o port sout9 multifunction serial ch.9 output [operation modes 0 to 2] (sda9) i 2 c ch.9 serial data line [operation mode 4] out0 output compare ch.0 output 117 p25 c general-purpose i/o port sin9 multifunction serial ch.9 input out1 output compare ch.1 output 118 p26 c general-purpose i/o port sck9 multifunction serial ch.9 clock [operation modes 0 to 2] (scl9) i 2 c ch.9 serial clock line [operation mode 4] out2 output compare ch.2 output 119 p27 c general-purpose i/o port out3 output compare ch.3 output 120 v ss ? gnd
mb91610 series 16 ds07-16907-2e i/o circuit type (continued) type circuit remarks a ? oscillation feedback resistance approx.1 m ? with standby control b ? cmos level output ? cmos level hysteresis input ? with pull-up control ? with standby control note: when this pin is used as an i 2 c pin, the digital output p-ch transistor is always off. clock input standby control x1 x0 p-ch p-ch n-ch digital output digital output pull-up control digital input standby control r r
mb91610 series ds07-16907-2e 17 (continued) type circuit remarks c ? cmos level output ? cmos level hysteresis input ? 5 v tolerant input ? with standby control note: when this pin is used as an i 2 c pin, the digital output p-ch transistor is always off. d ? cmos level output ? cmos level hysteresis input ? with input control ? analog input ? with pull-up control ? with standby control note: when this pin is used as an i 2 c pin, the digital output p-ch transistor is always off. digital output digital output digital input standby control p-ch n-ch r digital output digital output digital input standby control analog input input control pull-up control p-ch p-ch n-ch r r
mb91610 series 18 ds07-16907-2e (continued) type circuit remarks e ? cmos level hysteresis input ? with pull-up f cmos level hysteresis input p-ch p-ch n-ch digital input r r digital input p-ch n-ch r
mb91610 series ds07-16907-2e 19 (continued) type circuit remarks g ? oscillation feedback resistance approx.10m ? cmos level output ? cmos level hysteresis input ? with standby control h cmos level output digital output digital output digital input clock input standby control x1a standby control x0a digital input standby control digital output digital output p-ch n-ch p-ch n-ch r r digital output digital output p-ch n-ch
mb91610 series 20 ds07-16907-2e (continued) type circuit remarks i ? cmos level hysteresis input ? with pull-down control j ? cmos level output ? cmos level input ? with pull-down control k cmos level output (8 ma) p-ch n-ch r r digital input pull-down control p-ch n-ch r r digital input digital output digital output pull-down control digital output digital output p-ch n-ch
mb91610 series ds07-16907-2e 21 (continued) type circuit remarks l ? flash memory product only ? cmos level hysteresis input ? high voltage control for testing flash memory m analog pin usb usb i/o pin control pin mode input n-ch r n-ch n-ch n-ch n-ch p-ch n-ch udp(+) udm(-) differenti al udp ( + ) output udm ( ? ) output udp ( + ) input differential input udm ( ? ) input direction
mb91610 series 22 ds07-16907-2e precautions for handling the devices any semiconductor devices have inherently a certain rate of failure. the possibility of failure is greatly affected by the conditions in which they are used (circuit cond itions, environmental conditions , etc.). this page describes precautions that must be observed to minimize the c hance of failure and to obtain higher reliability from your fujitsu microelectronics semiconductor devices. 1. precautions for product design this section describes precautions when designing electronic equipment using semiconductor devices. ? absolute maximum ratings semiconductor devices can be permanently damaged by app lication of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. do not exceed these ratings. ? recommended operating conditions the recommended operating conditions are required in or der to ensure the normal operation of the semicon- ductor device. all of the device?s electrical characterist ics are warranted when the device is operated within these ranges. always use semiconductor devices within their reco mmended operating condition ranges. operation outside these ranges may adversely affect reliab ility and could result in device failure. no warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. users considering application outside the listed conditions are advised to contact their representatives beforehand. ? processing and protection of pins these precautions must be followed when handling the pi ns which connect semiconductor devices to power supply and input/output functions. (1) preventing over-voltage and over-current conditions exposure to voltage or current levels in excess of ma ximum ratings at any pin is likely to cause deterioration within the device, and in extreme cases leads to permanent damage of the device. try to prevent such overvoltage or over-current c onditions at the design stage. (2) protection of output pins shorting of output pins to supply pins or other out put pins, or connection to large capacitance can cause large current flows. such conditions if present for extended periods of time can damage the device. therefore, avoid this type of connection. (3) handling of unused input pins unconnected input pins with very high impedance levels can adversely affect stability of operation. such pins should be connected through an appropriate resist ance to a power supply pin or ground pin. - pll pin for osd (recommended pin hand ling when pll for osd is not in use) pin no. pin name recommended handling of unused pin 45 vssp v ss (pll macro gnd) 46 vddp v ss (pll macro power supply) 47 vci v ss 48 cpo v ss - analog osd (recommended pin handlin g when analog osd is not in use) pin no. pin name recommended handling of unused pin 49 vssd v ss (dac macro gnd)
mb91610 series ds07-16907-2e 23 50 vddd v ss (dac macro power supply) 51 vref v ss 52 vro v ss 53 rout v ss 54 gout v ss 55 bout v ss - digital osd (recommended pin handling when digital osd is not in use) pin no. pin name recommended handling of unused pin 19 r0 open 20 r1 open 21 r2 open 22 r3 open 23 r4 open 24 g0 open 25 g1 open 26 g2 open 27 g3 open 28 g4 open 29 g5 open 32 b0 open 33 b1 open 34 b2 open 35 b3 open 36 b4 open - other osd pins pin no. pin name recommended handling of unused pin 37 voa0 open 38 voa1 open 39 voa2 open 40 vob open 41 dcko open 42 dcki pull-down 43 vsync pull-down 44 hsync pull-down - usb (example of pin handling when usb is not in use) pin no. pin name recommended handling of unused pin 57 udp pull-down 58 udm pull-down -dsu pin pin no. pin name recommended handling of unused pin 83 trst reset signal input from user board 84 iclk open 85 ibreak open 86 ics0 open 87 ics1 open 88 ics2 open 92 icd0 open 93 icd1 open 94 icd2 open 95 icd3 open
mb91610 series 24 ds07-16907-2e ? latch-up semiconductor devices are constructed by the formati on of p-type and n-type areas on a substrate. when subjected to abnormally high voltages, internal parasi tic pnpn junctions (called thyristor structures) may be formed, causing large current levels in excess of seve ral hundred ma to flow continuously at the power supply pin. this condition is called latch-up. note: the occurrence of latch-up not only causes loss of reliability in the semicond uctor device, but can cause injury or damage from high heat, smoke or flame. to prevent this from happening, do the following: (a) be sure that voltages applied to pins do not exceed the absolute maximum ratings. this should include attention to abnormal noise, surge levels, etc. (b) be sure that abnormal current flows do not occur during the power-on sequence. ? observance of safety regulations and standards most countries in the world have established standards and regulations regarding safety, protection from elec- tromagnetic interference, etc. customers are requested to observe applicable regulations and standards in the design of products. ? fail-safe design any semiconductor devices have inherently a certain rate of failure. you must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redun- dancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. ? precautions related to usage of devices fujitsu microelectronics semiconductor devices ar e intended for use in standard applications (com- puters, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). caution: customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause phys ical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace sy stems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with fujitsu micro- electronics sales representatives before such use. t he company will not be responsible for damages arising from such use without prior approval.
mb91610 series ds07-16907-2e 25 2. precautions for package mounting package mounting may be either lead insertion type or su rface mount type. in either case, for heat resistance during soldering, you should only mount under fu jitsu microelectronics's recommended conditions. for detailed information about mount conditio ns, contact your sales representative. ? lead insertion type mounting of lead insertion type pack ages onto printed circuit boards ma y be done by two methods: direct soldering on the board, or mounting by using a socket. direct mounting onto boards normally involves processe s for inserting leads into through-holes on the board and using the flow soldering (wave solder ing) method of applying liquid solder. in this case, the soldering process usually causes lead s to be subjected to thermal stress in excess of the absolute ratings for storage temperature. mounting processes should conform to recommended mounting con- ditions. if socket mounting is used, difference s in surface treatment of the socket c ontacts and ic lead surfaces can lead to contact deterioration after long periods. for this reason it is recommended that the surface treatment of socket contacts and ic leads be verified before mounting. ? surface mount type surface mount packaging has longer and thinner leads than lead-insertion packaging, and therefore leads are more easily deformed or bent. the use of packages with higher pin counts and narrower pin pitch results in increased susceptibility to open connect ions caused by deformed pins, or shorting due to solder bridges. you must use appropriate mounting techniques. fuji tsu microelectronics recommends the solder reflow method, and has established a ranking of mounting cond itions for each product. users are advised to mount packages in accordance with fujitsu microe lectronics ranking of recommended conditions. ? lead-free packaging note: when ball grid array (bga) packages with sn-ag-cu balls are mounted using sn-pb eutectic soldering, junction strength may be reduced under some conditions of use. ? storage of semiconductor devices because plastic chip packages are formed from plastic resins, exposure to natural environmental conditions will cause absorption of moisture. during mounting, the applic ation of heat to a package that has absorbed moisture can cause surfaces to peel, reducing moisture resistance and causing pac kages to crack. to prevent, do the following: (a) avoid exposure to rapid temperature changes, whic h cause moisture to condense inside the product. store products in locations where te mperature changes are slight. (b) use dry boxes for product storage . products should be stored below 70% relative humidity, and at temper- atures between 5 c and 30 c. when you open dry package that reco mmends humidity 40% to 70% relative humidity. (c) when necessary, fujitsu microelectronics pac kages semiconductor devices in highly moisture- resistant aluminum laminate bags, with a silica gel desiccant. devices should be sealed in their aluminum laminate bags for storage. (d) avoid storing packages where they are expos ed to corrosive gases or high levels of dust.
mb91610 series 26 ds07-16907-2e ? baking packages that have absorbed moisture may be de-moisturi zed by baking (heat drying). follow the fujitsu microelectronics recommended conditions for baking. condition: + 125 c/24 h ? static electricity because semiconductor devices are particularly susceptible to damage by static electricity, you must take the following precautions: (a) maintain relative humidity in the working envi ronment between 40% and 70%. us e of an apparatus for ion generation may be needed to remove electricity. (b) electrically ground all conveyors, solder ve ssels, soldering irons and peripheral equipment. (c) eliminate static body electricity by the use of ri ngs or bracelets connected to ground through high resistance (on the level of 1 m ). wearing of conductive clothing and shoes , use of conductive floor mats and other measures to minimize shock loads is recommended. (d) ground all fixtures and instruments, or protect with anti-static measures. (e) avoid the use of styrofoam or other highly static -prone materials for storage of completed board assemblies. ? precautions for use environment reliability of semiconductor devices depends on ambient temperature and other conditions as described above. for reliable performance, do the following: (1) humidity prolonged use in high humidity can lead to leakage in device s as well as printed circuit boards. if high humidity levels are anticipated, consider anti-humidity processing. (2) discharge of static electricity when high-voltage charges exist close to semiconductor devices, discharges can cause abnormal operation. in such cases, use anti-static measures or processing to prevent discharges. (3) corrosive gases, dust, or oil exposure to corrosive gases or contact with dust or oil may lead to chemical reactions that will adversely affect the device. if you use devices in such conditions , consider ways to prevent such exposure or to protect the devices. (4) radiation, including cosmic radiation most devices are not designed for envi ronments involving exposure to radi ation or cosmic radiation. users should provide shielding as appropriate. (5) smoke, flame note : plastic molded devices are flammable, and theref ore should not be used near combustible substances. if devices begin to smoke or burn, there is danger of the release of toxic gases. customers considering the use of fujitsu microele ctronics products in other special environmental conditions should consult with sales representatives.
mb91610 series ds07-16907-2e 27 handling devices ? power supply pins in products with multiple v cc and v ss pins, respective pins at the same potential are interconnected within the device in order to prevent malfunctions such as latch-up. however, all of these pins should be connected externally to the power supply or ground lines in order to r educe electromagnetic emission levels, to prevent abnormal operation of strobe signals caused by the rise in the gr ound level, and to conform to the total output current rating. moreover, connect the current supply source with the v cc and v ss pins of this device at low impedance. it is also advisable that a ceramic capacitor of approximately 0.1 f be connected as a by pass capacitor between v cc and v ss near this device. ? crystal oscillator circuit noise near the x0 and x1 pins may caus e the device to malfunction. design the printed circuit board so that x0, x1, the crystal oscillator (or ceramic oscillator), and the bypass capacitor to ground are located as close to the device as possible. it is strongly recommended that the pc board artwork be designed such that the x0 and x1 pins are surrounded by ground plane as this is ex pected to produce stable operation. ? osdc output pin the osdc output pins (r0 to r4, g0 to g5, b0 to b4 , voa0 to voa2, vob, dcko) are high-speed corresponded output pin. adjust the signal waveform such as by insert ing damping resistor on the board as needed. ? using an external clock when using an external clock, the clock signal should be input to the x0 pin only and the x1 pin should be kept open. ? c pin as mb91610 series includes an internal regulator, al ways connect a bypass capacitor of approximately 4.7 f to the c pin for use by the regulator. ? example of using an external clock x0 x1 open mb91610 series c 4.7 f gnd v ss mb91610 series
mb91610 series 28 ds07-16907-2e ? mode pins (md0, md1) connect the md pin (md0, md1) directly to v cc or v ss pins. design the printed circuit board such that the pull- up/down resistance stays low, as well as the distance between the mode pins and v cc pins or v ss pins is as short as possible and the connection impedance is low, wh en the pins are pulled-up/down such as for switching the pin level and rewriting the flash memory data. it is because of preventing the device erroneously switching to test mode due to noise. ? notes on power-on ? to ensure that the internal regulator and the oscillato r have stabilized immediately after the power is turned on, keep an ?l? level input connected to the init pin for the duration of the regulator voltage stabilization wait time + the oscillator start time of the oscillato r + the main oscillator stabilization wait time. ? turn power on/off in the following order turning on : v cc av cc avrh turning off : avrh av cc v cc ? release the reset (init pin ?l? level to ?h? level) after the power supply has stabilized. ? caution on operations during pll clock mode on this microcontroller, if in case the crystal oscillator breaks off or an external reference clock input stops while the pll clock mode is selected, a self-oscillator circuit contained in the pll may c ontinue its operation at its self-running frequency. however, fujitsu microelectronics will not guarantee results of operations if such failure occurs.
mb91610 series ds07-16907-2e 29 block diagram fr80 cpu ram crossbar switch clock control peripheral bus bridge osdc dmac 8 channels clock generation watch counter 32-bit free-run timer, 1 channel 32-bit input capture, 4 channels 32-bit output compare, 4 channels multifunction serial interface, 4 channels multifunction serial interface with fifo, 4 channels base timer, 8 channels a/d converter, 8 channels (1 unit) hdmi-cec/ remote control reception, 1 channel watchdog timer interrupt controller delay interrupt external interrupt, 16 channels 16-bit reload timer, 3 channels ports ports 16-bit peripheral bus 32-bit peripheral bus ports on-chip bus step-down regulator usb clock generation usb function / host dsu4 internal program memory flash memory
mb91610 series 30 ds07-16907-2e memory space 1. memory space the fr family has 4 gbytes of logical address space (2 32 addresses) available to the cpu by linear access. ? direct addressing areas the following areas in the address space are used as i/o areas. these areas are called direct addressing areas, and th e address of an operand in these areas can be specified directly within an instruction. the size of the dire ctly addressable area depends on the length of the data being accessed as follows. ? byte data access : 0000 0000 h to 0000 00ff h ? half word data access : 0000 0000 h to 0000 01ff h ? word data access : 0000 0000 h to 0000 03ff h
mb91610 series ds07-16907-2e 31 2. memory map 0000 0000 h 0000 0400 h 0001 0000 h 000 3 8 000 h 0004 0000 h 000 8 0000 000f 8 000 h h 0010 0000 h ffff ffff h 0000 0000 h 0000 0400 h 0001 0000 h 000 3 8 000 h 0004 0000 h 000 8 0000 h 0010 0000 h ffff ffff h MB91F610A flash 512 kbytes ram 32 kbytes i/o area (direct addressing) i/o area reserved built-in ram area 32 kbytes flash area 512 kbytes reserved small-sector area reserved mb91613 rom 512 kbytes ram 32 kbytes i/o area (direct addressing) i/o area reserved built-in ram area 32 kbytes rom area 512 kbytes reserved reserved notes: ? small sector area is related to flash products only. please refer to the flash memory section of the hardware manual for more details. ? do not access the reserved areas.
mb91610 series 32 ds07-16907-2e i/o map [how to read the table] notes : ? when performing a data access, the addresses should be as below. - word access : address should be multiples of 4 (least significant 2 bits should be ?00 b ?) - half word access : address should be mult iples of 2 (least significant bit should be ?0 b ?) - byte access : ? ? do not access the reserved areas. address register block + 0 + 1 + 2 + 3 0000 0000 h pdr0 [r/w] b, h xxxxxxxx pdr1 [r/w] b, h xxxxxxxx pdr2 [r/w] b, h xxxxxxxxxxx pdr3 [r/w] b, h xxxxxxxx port data register 0000 003c h wdtcr0 [r/w] b, h -0--0000 wdtcpr0 [r/w] b, h 00000000 ? watchdog timer 0000 0040 h eirr0 [r/w] b, h, w 000 0000 enir0 [r/w] b, h, w 00000000 elvr0 [r/w] b, h, w 00000000 00000000 external interrupt 0 to 7 access unit ( b : byte , h : half word , w : word ) read/write attribute ?r? : indicates that there is a read only bit. ?r/w? : indicates that there is a read/write bit. ?w? : indicates that there is a write only bit. register name ( column 1 of the register is at address 4n, column 2 is at address 4 n + 2... ) leftmost register address ( for word-length access, column 1 of the register is the msb of the data. ) initial value after reset ?1? : initial value?1? ?0? : initial value?0? ?x? : initial value undefined ? - ? : reserved bit or undefined bit ? : reserved area
mb91610 series ds07-16907-2e 33 (continued) address register block + 0 + 1 + 2 + 3 0000 0000 h pdr0 [r/w] b,h xxxxxxxx pdr1 [r/w] b,h xxxxxxxx pdr2 [r/w] b,h xxxxxxxx pdr3 [r/w] b,h xxxxxxxx port data register 0000 0004 h ? pdr5 [r/w] b,h xxxxxxxx ? pdr7[r/w] b,h xxxxxxxx 0000 0008 h to 0000 0010 h ? 0000 0014 h pdrk [r/w] b ------xx ? 0000 0018 h to 0000 001c h ? 0000 0020 h rccr [r/w] b 0---0000 rcst [r/w] b 00000000 rcshw [r/w] b 00000000 rcdahw [r/w] b 00000000 hdmi-cec/ remote controller 0000 0024 h rcdbhw [r/w] b 00000000 ? rcadr1 [r/w] b ---00000 rcadr2 [r/w] b ---00000 0000 0028 h rcdthh [r] b,h,w 00000000 rcdthl [r] b,h,w 00000000 rcdtlh [r] b,h,w 00000000 rcdtll [r] b,h,w 00000000 0000 002c h rcckd [r/w] h ---00000 00000000 ? 0000 0030 h to 0000 0038 h ? reserved 0000 003c h wdtcr0[r/w] b,h 00000000 wdtcpr0[r/w] b,h 00000000 wdtcr1[r] b,h xxxx0000 wdtcpr1[r/w] b,h 00000000 watchdog timer 0000 0040 h eirr0[r/w] b,h,w 00000000 enir0[r/w] b,h,w 00000000 elvr0[r/w] b,h,w 00000000 00000000 external interrupt 0 to 7 0000 0044 h dicr [r/w] b ------- 0 ? delay interrupt 0000 0048 h tmrlra0 [r/w] h xxxxxxxx xxxxxxxx tmr0 [r] h xxxxxxxx xxxxxxxx 16-bit reload timer ch.0 0000 004c h ? tmcsr0 [r/w] h --000000 --000000 0000 0050 h tmrlra1 [r/w] h xxxxxxxx xxxxxxxx tmr1 [r] h xxxxxxxx xxxxxxxx 16-bit reload timer ch.1 0000 0054 h ? tmcsr1 [r/w] h --000000 --000000
mb91610 series 34 ds07-16907-2e (continued) address register block + 0 + 1 + 2 + 3 0000 0058 h tmrlra2 [r/w] h xxxxxxxx xxxxxxxx tmr2 [r] h xxxxxxxx xxxxxxxx 16-bit reload timer ch.2 0000 005c h ? tmcsr2 [r/w] h --000000 --000000 0000 0060 h scr0 [r/w] b,h,w 0--00000 smr0 [r/w] b,h,w 000-0000 ssr0 [r,r/w] b,h,w 0-000011 escr0 [r/w] b,h,w -0000000 multi-function serial interface ch.0 0000 0064 h rdr0[r]/tdr0[w] b,h,w* 1 -------0 00000000 bgr10[r/w]h,w 00000000 bgr00[r/w] h,w 00000000 0000 0068 h scr1[r/w] ibcr1[r,r/w] b,h,w* 2 0--00000 smr1 [r/w] b,h,w 000-0000 ssr1 [r,r/w] b,h,w 0-000011 escr1[r/w] ibsr1[r,r/w] b,h,w* 2 -0000000 multi-function serial interface ch.1 0000 006c h rdr1[r]/tdr1[w] b,h,w* 1 -------0 00000000 bgr11[r/w] h,w 00000000 bgr01[r/w] h,w 00000000 0000 0070 h ismk1 [r/w] b,h* 2 -------- isba1 [r/w] b,h* 2 -------- ? 0000 0074 h scr2[r/w] ibcr2[r,r/w] b,h,w* 2 0--00000 smr2 [r/w] b,h,w 000-0000 ssr2 [r,r/w] b,h,w 0-000011 escr2[r/w] ibsr2 [r,r/w] b,h,w* 2 -0000000 multi-function serial interface ch.2 0000 0078 h rdr2[r]/tdr2[w] b,h,w* 1 -------0 00000000 bgr12[r/w] h,w 00000000 bgr02[r/w] h,w 00000000 0000 007c h ismk2 [r/w] b,h* 2 -------- isba2 [r/w] b,h* 2 -------- ? 0000 0080 h scr3[r/w] ibcr3[r,r/w] b,h,w* 2 0--00000 smr3 [r/w] b,h,w 000-0000 ssr3 [r,r/w] b,h,w 0-000011 escr3[r/w] ibsr3[r,r/w] b,h,w* 2 -0000000 multi-function serial interface ch.3 0000 0084 h rdr3[r]/tdr3[w] b,h,w* 1 -------0 00000000 bgr13[r/w] h,w 00000000 bgr03[r/w] h,w 00000000 0000 0088 h ismk3 [r/w] b,h* 2 -------- isba3 [r/w] b,h* 2 -------- ? 0000 008c h to 0000 00bc h ? reserved
mb91610 series ds07-16907-2e 35 (continued) address register block + 0 + 1 + 2 + 3 0000 00c0 h rdrm0 [r]/ tdrm0[w] b,h,w 00000000 rdrm1 [r]/ tdrm1[w] b,h,w 00000000 rdrm2 [r]/ tdrm2[w] b,h,w 00000000 rdrm3 [r]/ tdrm3[w] b,h,w 00000000 multi-function serial interface data register (mirror) 0000 00c4 h ? 0000 00c8 h ssel0123 [r/w] b ------00 ? multi-function serial interface serial clock selection 0000 00cc h ? reserved 0000 00d0 h scr8 [r/w] ibcr8 [r,r/w] b,h,w* 2 0--00000 smr8 [r/w] b,h,w 000-0000 ssr8 [r,r/w] b,h,w 0-000011 escr8 [r/w] ibsr8 [r,r/w] b,h,w* 2 -0000000 multi-function serial interface ch. 8 (fifo) 0000 00d4 h rdr8[r]/tdr8[w] b,h,w* 1 -------0 00000000 bgr18 [r/w] h,w 00000000 bgr08 [r,r/w] h,w 00000000 0000 00d8 h ismk8 [r/w] b,h* 2 -------- isba8 [r/w] b,h* 2 -------- ? 0000 00dc h fcr18 [r/w] b,h,w ---00100 fcr08 [r,r/w] b,h,w -0000000 fbyte28 [r/w] b,h,w 00000000 fbyte18 [r/w] b,h,w 00000000 0000 00e0 h scr9 [r/w] ibcr9 [r,r/w] b,h,w* 2 0--00000 smr9 [r/w] b,h,w 000-0000 ssr9 [r,r/w] b,h,w 0-000011 escr9 [r/w] ibsr9[r,r/w] b,h,w* 2 -0000000 multi-function serial interface ch. 9 (fifo) 0000 00e4 h rdr9[r]/tdr9[w] b,h,w* 1 -------0 00000000 bgr19 [r/w] h,w 00000000 bgr09 [r/w] h,w 00000000 0000 00e8 h ismk9 [r/w] b,h* 2 -------- isba9 [r/w] b,h* 2 -------- ? 0000 00ec h fcr19 [r/w] b,h,w ---00100 fcr09 [r,r/w] b,h,w -0000000 fbyte29 [r/w] b,h,w 00000000 fbyte19 [r/w] b,h,w 00000000
mb91610 series 36 ds07-16907-2e (continued) address register block + 0 + 1 + 2 + 3 0000 00f0 h scr10 [r/w] ibcr10 [r,r/w] b,h,w* 2 0--00000 smr10 [r/w] b,h,w 000-0000 ssr10 [r,r/w] b,h,w 0-000011 escr10 [r/w] ibsr10 [r,r/w] b,h,w* 2 -0000000 multi-function serial interface ch.10 (fifo) 0000 00f4 h rdr10[r]/tdr10[w] b,h,w* 1 -------0 00000000 bgr110 [r/w] h,w 00000000 bgr010 [r/w] h,w 00000000 0000 00f8 h ismk10 [r/w] b,h* 2 -------- isba10 [r/w] b,h* 2 -------- ? 0000 00fc h fcr110 [r/w] b,h,w ---00100 fcr010 [r,r/w] b,h,w -0000000 fbyte210 [r/w] b,h,w 00000000 fbyte110 [r/w] b,h,w 00000000 0000 0100 h scr11 [r/w] ibcr11 [r,r/w] b,h,w* 2 0--00000 smr11 [r/w] b,h,w 000-0000 ssr11 [r,r/w] b,h,w 0-000011 escr11 [r/w] ibsr11 [r,r/w] b,h,w* 2 -0000000 multi-function serial interface ch.11 (fifo) 0000 0104 h rdr11[r]/tdr11[w] b,h,w* 1 -------0 00000000 bgr111 [r/w] h,w 00000000 bgr011 [r/w] h,w 00000000 0000 0108 h ismk11 [r/w] b,h* 2 -------- isba11 [r/w] b,h* 2 -------- ? 0000 010c h fcr111 [r/w] b,h,w ---00100 fcr011 [r,r/w] b,h,w -0000000 fbyte211 [r/w] b,h,w 00000000 fbyte111 [r/w] b,h,w 00000000 0000 0110 h eirr1[r/w] b,h,w 00000000 enir1[r/w] b,h,w 00000000 elvr1[r/w] b,h,w 00000000 00000000 external interrupt 8 to 15 0000 0114 h to 0000 011c h ? reserved
mb91610 series ds07-16907-2e 37 (continued) address register block + 0 + 1 + 2 + 3 0000 0120 h adcr0[r/w] b,h 000-0000 adsr0[r,r/w] b,h 00---000 ? a/d converter 0000 0124 h sccr0[r,r/w] b,h 1000-000 sfns0[r/w] b,h ----0000 scfd0[r] b,h xxxxxxxx xx-xxxxx 0000 0128 h ? scis00[r/w] b 00000000 0000 012c h pccr0[r,r/w] b,h 1000-000 pfns0[r/w] b,h ------00 pcfd0[r] b,h xxxxxxxx xxxxxxxx 0000 0130 h pcis0[r/w] b 00000000 ? cmpd0[r/w] b,h 00000000 cmpcr0[r/w] b,h 00000000 0000 0134 h ? adss00[r/w] b 00000000 0000 0138 h adst00[r/w] b,h 00100000 adst10[r/w] b,h 00100000 adct0[r/w] b -----111 ? 0000 013c h ? reserved 0000 0140 h bt0tmr[r]h 00000000 00000000 bt0tmcr[r/w] b,h -0000000 00000000 base timer ch.0 0000 0144 h ? bt0stc[r/w]b 0000-000 ? 0000 0148 h bt0pcsr/bt0prll[r/w]h xxxxxxxx xxxxxxxx bt0pdut/bt0prlh/bt0dtbf [r/w]h xxxxxxxx xxxxxxxx 0000 014c h ? 0000 0150 h bt1tmr[r]h 00000000 00000000 bt1tmcr[r/w] b,h -0000000 00000000 base timer ch.1 0000 0154 h ? bt1stc[r/w]b 0000-000 ? 0000 0158 h bt1pcsr/bt1prll[r/w]h xxxxxxxx xxxxxxxx bt1pdut/bt1prlh/bt1dtbf [r/w]h xxxxxxxx xxxxxxxx 0000 015c h ?
mb91610 series 38 ds07-16907-2e (continued) address register block + 0 + 1 + 2 + 3 0000 0160 h bt2tmr[r]h 00000000 00000000 bt2tmcr [r/w] b,h -0000000 00000000 base timer ch.2 0000 0164 h ? bt2stc[r/w]b 0000-000 ? 0000 0168 h bt2pcsr/bt2prll[r/w]h xxxxxxxx xxxxxxxx bt2pdut/bt2prlh/bt2dtbf [r/w]h xxxxxxxx xxxxxxxx 0000 016c h ? 0000 0170 h bt3tmr[r]h 00000000 00000000 bt3tmcr[r/w] b,h -0000000 00000000 base timer ch.3 0000 0174 h ? bt3stc[r/w]b 0000-000 ? 0000 0178 h bt3pcsr/bt3prll[r/w]h xxxxxxxx xxxxxxxx bt3pdut/bt3prlh/bt3dtbf [r/w]h xxxxxxxx xxxxxxxx 0000 017c h btsel0123 [r/w] b 00000000 ? 0000 0180 h to 0000 01a8 h ? reserved 0000 01ac h adche [r/w] b,h,w -------- -------- -------- 11111111 a/d channel enable 0000 01b0 h irpr0h [r] b 000----- ? irpr1h [r] b,h 000-000- irpr1l [r] b,h 000-000- interrupt request batch read function 0000 01b4 h ? irpr2l [r] b,h,w 000----- irpr3h [r] b,h,w 0000---- ? 0000 01b8 h irpr4h [r] b,h,w 0000---- ? irpr5h [r] b,h,w 0000---- irpr5l [r] b,h,w 0000---- 0000 01bc h ? irpr7l [r] b,h,w 0000---- 0000 01c0 h to 0000 01fc h ? reserved 0000 0200 h cpclr0 [r/w] w 11111111 11111111 11111111 11111111 32-bit free-run timer ch.0 0000 0204 h tcdt0 [r/w] w 00000000 00000000 00000000 00000000 0000 0208 h tccsh0 [r/w] b,h 0-----00 tccsl0 [r/w] b,h -1-00000 ?
mb91610 series ds07-16907-2e 39 (continued) address register block + 0 + 1 + 2 + 3 0000 020c h ipcp0 [r] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 32-bit input capture ch.0 to ch.3 0000 0210 h ipcp1 [r] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 0214 h ipcp2 [r] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 0218 h ipcp3 [r] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 021c h ? ics01 [r/w] b 00000000 ? ics23 [r/w] b 00000000 0000 0220 h to 0000 0230 h ? reserved 0000 0234 h occp0 [r/w] w 00000000 00000000 00000000 00000000 32-bit output compare ch.0 to ch.3 0000 0238 h occp1 [r/w] w 00000000 00000000 00000000 00000000 0000 023c h occp2 [r/w] w 00000000 00000000 00000000 00000000 0000 0240 h occp3 [r/w] w 00000000 00000000 00000000 00000000 0000 0244 h ocsh1 [r/w] b,h,w ---0--00 ocsl0 [r/w] b,h,w 0000--00 ocsh3 [r/w] b,h,w ---0--00 ocsl2 [r/w] b,h,w 0000--00 0000 0248 h to 0000 031c h ? reserved 0000 0320 h fctlr[r/w] h -0--1011 -------- ? fstr[r] b -------1 flash memory control 0000 0324 h to 0000 0334 h ? reserved 0000 0338 h ? wren[r/w] b,h 00000000 00000000 wild register 0000 033c h ? 0000 0340 h to 0000 037c h ? reserved
mb91610 series 40 ds07-16907-2e (continued) address register block + 0 + 1 + 2 + 3 0000 0380 h wrar00[r/w] w -------- --xxxxxx xxxxxxxx xxxxxx-- wild register 0000 0384 h wrdr00[r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 0388 h wrar01[r/w] w -------- --xxxxxx xxxxxxxx xxxxxx-- 0000 038c h wrdr01[r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 0390 h wrar02[r/w] w -------- --xxxxxx xxxxxxxx xxxxxx-- 0000 0394 h wrdr02[r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 0398 h wrar03[r/w] w -------- --xxxxxx xxxxxxxx xxxxxx-- 0000 039c h wrdr03[r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 03a0 h wrar04[r/w] w -------- --xxxxxx xxxxxxxx xxxxxx-- 0000 03a4 h wrdr04[r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 03a8 h wrar05[r/w] w -------- --xxxxxx xxxxxxxx xxxxxx-- 0000 03ac h wrdr05[r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 03b0 h wrar06[r/w] w -------- --xxxxxx xxxxxxxx xxxxxx-- 0000 03b4 h wrdr06[r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 03b8 h wrar07[r/w] w -------- --xxxxxx xxxxxxxx xxxxxx-- 0000 03bc h wrdr07[r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 03c0 h wrar08[r/w] w -------- --xxxxxx xxxxxxxx xxxxxx-- 0000 03c4 h wrdr08[r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 03c8 h wrar09[r/w] w -------- --xxxxxx xxxxxxxx xxxxxx-- 0000 03cc h wrdr09[r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx
mb91610 series ds07-16907-2e 41 (continued) address register block + 0 + 1 + 2 + 3 0000 03d0 h wrar10[r/w] w -------- --xxxxxx xxxxxxxx xxxxxx-- wild register 0000 03d4 h wrdr10[r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 03d8 h wrar11[r/w] w -------- --xxxxxx xxxxxxxx xxxxxx-- 0000 03dc h wrdr11[r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 03e0 h wrar12[r/w] w -------- --xxxxxx xxxxxxxx xxxxxx-- 0000 03e4 h wrdr12[r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 03e8 h wrar13[r/w] w -------- --xxxxxx xxxxxxxx xxxxxx-- 0000 03ec h wrdr13[r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 03f0 h wrar14[r/w] w -------- --xxxxxx xxxxxxxx xxxxxx-- 0000 03f4 h wrdr14[r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 03f8 h wrar15[r/w] w -------- --xxxxxx xxxxxxxx xxxxxx-- 0000 03fc h wrdr15[r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 0400 h ddr0 [r/w] b,h 00000000 ddr1 [r/w] b,h 00000000 ddr2 [r/w] b,h 00000000 ddr3 [r/w] b,h 00000000 data direction register 0000 0404 h ? ddr5 [r/w] b,h 00000000 ? ddr7[r/w] b,h 00000000 0000 0408 h to 0000 0410 h ? 0000 0414 h ddrk [r/w] b ------00 ? 0000 0418 h to 0000 041c h ? 0000 0420 h pcr0 [r/w] b,h 00000000 pcr1 [r/w] b,h 00000000 ? pull-up control register 0000 0424 h ? pcr5 [r/w] b 00000000 ? pcr7[r/w] b,h 00000000 0000 0428 h to 0000 043c h ?
mb91610 series 42 ds07-16907-2e (continued) address register block + 0 + 1 + 2 + 3 0000 0440 h icr00 [r,r/w] b,h,w ---11111 icr01 [r,r/w] b,h,w ---11111 icr02 [r,r/w] b,h,w ---11111 icr03 [r,r/w] b,h,w ---11111 interrupt control 0000 0444 h icr04 [r,r/w] b,h,w ---11111 icr05 [r,r/w] b,h,w ---11111 icr06 [r,r/w] b,h,w ---11111 icr07 [r,r/w] b,h,w ---11111 0000 0448 h icr08 [r,r/w] b,h,w ---11111 icr09 [r,r/w] b,h,w ---11111 icr10 [r,r/w] b,h,w ---11111 icr11 [r,r/w] b,h,w ---11111 0000 044c h icr12 [r,r/w] b,h,w ---11111 icr13 [r,r/w] b,h,w ---11111 icr14 [r,r/w] b,h,w ---11111 icr15 [r,r/w] b,h,w ---11111 0000 0450 h icr16 [r,r/w] b,h,w ---11111 icr17 [r,r/w] b,h,w ---11111 icr18 [r,r/w] b,h,w ---11111 icr19 [r,r/w] b,h,w ---11111 0000 0454 h icr20 [r,r/w] b,h,w ---11111 icr21 [r,r/w] b,h,w ---11111 icr22 [r,r/w] b,h,w ---11111 icr23 [r,r/w] b,h,w ---11111 0000 0458 h icr24 [r,r/w] b,h,w ---11111 icr25 [r,r/w] b,h,w ---11111 icr26 [r,r/w] b,h,w ---11111 icr27 [r,r/w] b,h,w ---11111 0000 045c h icr28 [r,r/w] b,h,w ---11111 icr29 [r,r/w] b,h,w ---11111 icr30 [r,r/w] b,h,w ---11111 icr31 [r,r/w] b,h,w ---11111 0000 0460 h icr32 [r,r/w] b,h,w ---11111 icr33 [r,r/w] b,h,w ---11111 icr34 [r,r/w] b,h,w ---11111 icr35 [r,r/w] b,h,w ---11111 0000 0464 h icr36 [r,r/w] b,h,w ---11111 icr37 [r,r/w] b,h,w ---11111 icr38 [r,r/w] b,h,w ---11111 icr39 [r,r/w] b,h,w ---11111 0000 0468 h icr40 [r,r/w] b,h,w ---11111 icr41 [r,r/w] b,h,w ---11111 icr42 [r,r/w] b,h,w ---11111 icr43 [r,r/w] b,h,w ---11111 0000 046c h icr44 [r,r/w] b,h,w ---11111 icr45 [r,r/w] b,h,w ---11111 icr46 [r,r/w] b,h,w ---11111 icr47 [r,r/w] b,h,w ---11111 0000 0470 h to 0000 047c h ? reserved 0000 0480 h rstrr [r] b,h,w 11xx---x* 3 rstcr [r/w] b,h,w 000----0 stbcr [r/w] b,h,w 0000--11 slprr [r/w] b,h,w 00000000 reset control/ power consumption control 0000 0484 h ?
mb91610 series ds07-16907-2e 43 (continued) address register block + 0 + 1 + 2 + 3 0000 0488 h divr0 [r/w] b,h 000--011 ? divr2 [r/w] b 0011---- ? clock division control 0000 048c h ? 0000 0490 h iorr0 [r/w] b,h,w -0000000 iorr1 [r/w] b,h,w -0000000 iorr2 [r/w] b,h,w -0000000 iorr3 [r/w] b,h,w -0000000 peripheral dma transmission request control 0000 0494 h iorr4 [r/w] b,h,w -0000000 iorr5 [r/w] b,h,w -0000000 iorr6 [r/w] b,h,w -0000000 iorr7 [r/w] b,h,w -0000000 0000 0498 h to 0000 049c h ? reserved 0000 04a0 h pfr0 [r/w] b,h 00000000 pfr1 [r/w] b,h 00000000 pfr2 [r/w] b,h 00000000 pfr3 [r/w] b,h 00000000 port function register 0000 04a4 h ? pfr5 [r/w] b,h 00000000 ? pfr7[r/w] b,h 00000000 0000 04a8 h to 0000 04b0 h ? 0000 04b4 h pfrk [r/w] b,h ----0000 ? 0000 04b8 h epfr0 [r/w] b,h ---00-00 epfr1 [r/w] b,h ---00-00 ? extended port function register 0000 04bc h ? epfr6 [r/w] b,h -00-00-0 epfr7 [r/w] b,h ----0-0- 0000 04c0 h epfr8 [r/w] b,h ----0-0- epfr9 [r/w] b,h ----00-0 epfr10 [r/w] b,h ----0--- ? 0000 04c4 h ? epfr14 [r/w] b,h ----0-0- epfr15 [r/w] b,h ----0-0- 0000 04c8 h epfr16 [r/w] b,h ----0-0- epfr17 [r/w] b,h ----0-0- ? epfr19 [r/w] b,h -------1 0000 04cc h epfr20 [r/w] b,h ---0--0- epfr21 [r/w] b,h ---0--0- epfr22 [r/w] b,h ---0--0- epfr23 [r/w] b,h ---0--0- 0000 04d0 h , 0000 04d4 h ? 0000 04d8 h ? epfr33 [r/w] b,h ---0--0- epfr34 [r/w] b,h --0----- ? 0000 04dc h ?
mb91610 series 44 ds07-16907-2e (continued) address register block + 0 + 1 + 2 + 3 0000 04e0 h to 0000 04ec h ? reserved 0000 04f0 h icsel0[r/w] b,h,w -----000 icsel1[r/w] b,h,w -----000 ? dma start request clear select function 0000 04f4 h icsel4[r/w] b,h,w ------00 ? icsel6[r/w] b,h,w ------00 icsel7[r/w] b,h,w -------0 0000 04f8 h icsel8[r/w] b,h,w ------00 ? icsel10[r/w] b,h,w ----0000 icsel11[r/w] b,h,w ----0000 0000 04fc h ? 0000 0500 h to 0000 050c h ? reserved 0000 0510 h cselr [r/w] b,h,w 001---00 cmonr [r] b,h,w 001---00 mtmcr [r/w] b,h,w 00001111 stmcr [r/w] b,h,w 0000-111 clock generation/ main timer/ sub timer 0000 0514 h pllcr [r/w] b,h --000000 11110000 cstbr [r/w] b -0000000 ? 0000 0518 h wcrd [r] b,h --000000 wcrl [r/w] b,h --000000 wccr [r,r/w] b 00--0000 ? clock counter 0000 051c h uccr [r/w] b -----001 ? usb clock generation 0000 0520 h to 0000 0bfc h ? reserved 0000 0c00 h dccr0 [r/w] w 0----000 --00--00 00000000 0-000000 dmac 0000 0c04 h dcsr0 [r,r/w] h 0------- -----000 dtcr0 [r/w] h 00000000 00000000 0000 0c08 h dsar0 [r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 0c0c h ddar0 [r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 0c10 h dccr1 [r/w] w 0----000 --00--00 00000000 0-000000 0000 0c14 h dcsr1 [r,r/w] h 0------- -----000 dtcr1 [r/w] h 00000000 00000000 0000 0c18 h dsar1 [r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 0c1c h ddar1 [r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx
mb91610 series ds07-16907-2e 45 (continued) address register block + 0 + 1 + 2 + 3 0000 0c20 h dccr2 [r/w] w 0----000 --00--00 00000000 0-000000 dmac 0000 0c24 h dcsr2 [r,r/w] h 0------- -----000 dtcr2 [r/w] h 00000000 00000000 0000 0c28 h dsar2 [r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 0c2c h ddar2 [r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 0c30 h dccr3 [r/w] w 0----000 --00--00 00000000 0-000000 0000 0c34 h dcsr3 [r,r/w] h 0------- -----000 dtcr3 [r/w] h 00000000 00000000 0000 0c38 h dsar3 [r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 0c3c h ddar3 [r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 0c40 h dccr4 [r/w] w 0----000 --00--00 00000000 0-000000 0000 0c44 h dcsr4 [r,r/w] h 0------- -----000 dtcr4 [r/w] h 00000000 00000000 0000 0c48 h dsar4 [r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 0c4c h ddar4 [r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 0c50 h dccr5 [r/w] w 0----000 --00--00 00000000 0-000000 0000 0c54 h dcsr5 [r,r/w] h 0------- -----000 dtcr5 [r/w] h 00000000 00000000 0000 0c58 h dsar5 [r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 0c5c h ddar5 [r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 0c60 h dccr6 [r/w] w 0----000 --00--00 00000000 0-000000 0000 0c64 h dcsr6 [r,r/w] h 0------- -----000 dtcr6 [r/w] h 00000000 00000000 0000 0c68 h dsar6 [r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 0c6c h ddar6 [r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 0c70 h dccr7 [r/w] w 0----000 --00--00 00000000 0-000000 0000 0c74 h dcsr7 [r,r/w] h 0------- -----000 dtcr7 [r/w] h 00000000 00000000
mb91610 series 46 ds07-16907-2e (continued) address register block + 0 + 1 + 2 + 3 0000 0c78 h dsar7 [r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx dmac 0000 0c7c h ddar7 [r/w] w xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0000 0c80 h to 0000 0df0 h ? 0000 0df4 h ? dilvr [r,r/w] b ---11111 0000 0df8 h dmacr [r/w] w 0------- -------- 0------- -------- 0000 0dfc h to 0000 0f3c h ? reserved 0000 0f40 h bt4tmr[r]h 00000000 00000000 bt4tmcr[r/w] b,h -0000000 00000000 base timer ch.4 0000 0f44 h ? bt4stc[r/w]b 0000-000 ? 0000 0f48 h bt4pcsr/bt4prll[r/w]h xxxxxxxx xxxxxxxx bt4pdut/bt4prlh/bt4dtbf [r/w]h xxxxxxxx xxxxxxxx 0000 0f4c h ? 0000 0f50 h bt5tmr[r]h 00000000 00000000 bt5tmcr[r/w] b,h -0000000 00000000 base timer ch.5 0000 0f54 h ? bt5stc[r/w]b 0000-000 ? 0000 0f58 h bt5pcsr/bt5prll[r/w]h xxxxxxxx xxxxxxxx bt5pdut/bt5prlh/bt5dtbf [r/w]h xxxxxxxx xxxxxxxx 0000 0f5c h ? 0000 0f60 h bt6tmr[r]h 00000000 00000000 bt6tmcr[r/w] b,h -0000000 00000000 base timer ch.6 0000 0f64 h ? bt6stc[r/w]b 0000-000 ? 0000 0f68 h bt6pcsr/bt6prll[r/w]h xxxxxxxx xxxxxxxx bt6pdut/bt6prlh/bt6dtbf [r/w]h xxxxxxxx xxxxxxxx 0000 0f6c h ?
mb91610 series ds07-16907-2e 47 (continued) address register block + 0 + 1 + 2 + 3 0000 0f70 h bt7tmr[r]h 00000000 00000000 bt7tmcr[r/w] b,h -0000000 00000000 base timer ch.7 0000 0f74 h ? bt7stc[r/w]b 0000-000 ? 0000 0f78 h bt7pcsr/bt7prll[r/w]h xxxxxxxx xxxxxxxx bt7pdut/bt7prlh/bt7dtbf [r/w]h xxxxxxxx xxxxxxxx 0000 0f7c h btsel4567 [r/w] b 00000000 ? 0000 0f80 h to 0000 0ff8 h ? reserved 0000 0ffc h ? btsssr[w] h xxxxxxxx xxxxxxxx base timer i/o select function 0000 1000 h to 0000 20fc h ? reserved 0000 2100 h hcnt1[r/w] b,h -----001 hcnt0[r/w] b,h 00000000 ? usb function / host 0000 2104 h herr[r/w] b,h 00000011 hirq[r/w] b,h 0-000000 ? 0000 2108 h hfcomp[r/w] b,h 00000000 hstate[r,r/w] b,h ---10010 ? 0000 210c h hrtimer1[r/w] b,h 00000000 hrtimer0[r/w] b,h 00000000 ? 0000 2110 h hadr[r/w] b,h -0000000 hrtimer2[r/w] b,h ------00 ? 0000 2114 h heof1[r/w] b,h --000000 heof0[r/w] b,h 00000000 ? 0000 2118 h hframe1[r/w] b,h -----000 hframe0[r/w] b,h 00000000 ? 0000 211c h ? htoken[r/w] b 00000000 ? 0000 2120 h ? udcc[r/w] b 1010--00 ?
mb91610 series 48 ds07-16907-2e (continued) address register block + 0 + 1 + 2 + 3 0000 2124 h ep0c[r/w] h ------0- -1000000 ? usb function / host 0000 2128 h ep1c[r/w] h 01100001 00000000 ? 0000 212c h ep2c[r/w] h 0110000- -1000000 ? 0000 2130 h ep3c[r/w] h 0110000- -1000000 ? 0000 2134 h ep4c[r/w] h 0110000- -1000000 ? 0000 2138 h ep5c[r/w] h 0110000- -1000000 ? 0000 213c h tmsp[r] h -----000 00000000 ? 0000 2140 h udcie[r,r/w] b,h --000000 udcs[r/w] b,h --000000 ? 0000 2144 h ep0is[r/w] h 10---1-- -------- ? 0000 2148 h ep00s[r,r/w] h 100--00- -xxxxxxx ? 0000 214c h ep1s[r,r/w] h 100-000x xxxxxxxx ? 0000 2150 h ep2s[r,r/w] h 100-000- -xxxxxxx ? 0000 2154 h ep3s[r,r/w] h 100-000- -xxxxxxx ? 0000 2158 h ep4s[r,r/w] h 100-000- -xxxxxxx ? 0000 215c h ep5s[r,r/w] h 100-000- -xxxxxxx ? 0000 2160 h ep0dth [r/w] b,h xxxxxxxx ep0dtl [r/w] b,h xxxxxxxx ? 0000 2164 h ep1dth [r/w] b,h xxxxxxxx ep1dtl [r/w] b,h xxxxxxxx ? 0000 2168 h ep2dth [r/w] b,h xxxxxxxx ep2dtl [r/w] b,h xxxxxxxx ? 0000 216c h ep3dth [r/w] b,h xxxxxxxx ep3dtl [r/w] b,h xxxxxxxx ?
mb91610 series ds07-16907-2e 49 (continued) address register block + 0 + 1 + 2 + 3 0000 2170 h ep4dth [r/w] b,h xxxxxxxx ep4dtl [r/w] b,h xxxxxxxx ? usb function / host 0000 2174 h ep5dth [r/w] b,h xxxxxxxx ep5dtl [r/w] b,h xxxxxxxx ? 0000 2178 h to 0000 217c h ? 0000 2180 h to 0000 21a0 h ? reserved 0000 21a4 h dreqsel [r/w] b,h 00111011 usbsel [r/w] b,h -------0 usben [r/w] b -------0 ? dma transfer request selector/ usb enable 0000 21a8 h to 0000 3ffc h ? reserved 0000 4000 h mosd_vadr [w] w -------- -------0 ---00000 --000000 osdc (main) 0000 4004 h mosd_cds1 [w] w 00000000 ---00000 00000000 00000000 0000 4008 h mosd_cds2 [w] w -------- 0000-000 --000000 00000000 0000 400c h mosd_lds1 [w] w 0000-000 00000000 ----0000 00000000 0000 4010 h mosd_lds2 [w] w -------- ---00000 --000000 00000000 0000 4014 h mosd_scoc [w] w ------00 0000---- ---0---0 xxxx---- 0000 4018 h mosd_hvdp [w] w -----000 00000000 -----000 00000000 0000 401c h mosd_tsbc [w] w -------- -------- -------0 00000000 0000 4020 h mosd_grcc [w] w -------0 00000000 -------0 00000000 0000 4024 h mosd_sbcc [w] w -----000 ------00 --000000 00000000 0000 4028 h mosd_scbc [w] w -------- --00--00 ---0-000 00000000 0000 402c h mosd_wpc1 [w] w -----000 00000000 -----000 00000000
mb91610 series 50 ds07-16907-2e (continued) address register block + 0 + 1 + 2 + 3 0000 4030 h mosd_wpc2 [w] w ----0000 00000000 ----0000 00000000 osdc (main) 0000 4034 h mosd_spc1 [w] w ---0-000 ------00 --000000 00000000 0000 4038 h mosd_spc2 [w] w ----0000 00000000 -----000 00000000 0000 403c h mosd_sync [w] w -------- --000000 -------- -0-0---- 0000 4040 h mosd_cbc0 [w] w --000000 00000000 --000000 00000000 0000 4044 h mosd_cbc1 [w] w --000000 00000000 --000000 00000000 0000 4048 h mosd_cbc2 [w] w --000000 00000000 --000000 00000000 0000 404c h mosd_cbc3 [w] w --000000 00000000 --000000 00000000 0000 4050 h mosd_cbc4 [w] w --000000 00000000 --000000 00000000 0000 4054 h mosd_cbc5 [w] w --000000 00000000 --000000 00000000 0000 4058 h mosd_cbc6 [w] w --000000 00000000 --000000 00000000 0000 405c h mosd_cbc7 [w] w --000000 00000000 --000000 00000000 0000 4060 h mosd_iotc [w] w -------0 0----00- -------- -----xxx 0000 4064 h mosd_cdp1 [w] w -----000 00000000 -----000 00000000 0000 4068 h mosd_cdp2 [w] w ----0000 00000000 ----0000 00000000 0000 406c h mosd_intc [r/w] w -------- -------- -----xxx -----xxx 0000 4070 h mosd_sbc0 [w] w 00000000 00000000 00000000 00000000 0000 4074 h mosd_sbc1 [w] w 00000000 00000000 00000000 00000000 0000 4078 h mosd_sbc2 [w] w 00000000 00000000 00000000 00000000 0000 407c h mosd_sbc3 [w] w 00000000 00000000 00000000 00000000
mb91610 series ds07-16907-2e 51 (continued) address register block + 0 + 1 + 2 + 3 0000 4080 h to 0000 40fc h ? reserved 0000 4100 h sosd_vadr [w] w -------- -------0 ---00000 --000000 osdc (sub) 0000 4104 h sosd_cds1 [w] w 00000000 ---00000 00000000 00000000 0000 4108 h sosd_cds2 [w] w -------- 0000-000 --000000 00000000 0000 410c h sosd_lds1 [w] w 0000-000 00000000 ----0000 00000000 0000 4110 h sosd_lds2 [w] w -------- ---00000 --000000 00000000 0000 4114 h sosd_scoc [w] w ------00 0000---- ---0---0 xx-x---x 0000 4118 h sosd_hvdp [w] w -----000 00000000 -----000 00000000 0000 411c h sosd_tsbc [w] w -------- -------- -------0 00000000 0000 4120 h sosd_grcc [w] w -------0 00000000 -------0 00000000 0000 4124 h ? 0000 4128 h sosd_scbc [w] w -------- --00--00 ---0-000 00000000 0000 412c h sosd_wpc1 [w] w -----000 00000000 -----000 00000000 0000 4130 h sosd_wpc2 [w] w ----0000 00000000 ----0000 00000000 0000 4134 h sosd_spc1 [w] w ---0-000 ------00 --000000 00000000 0000 4138 h sosd_spc2 [w] w ----0000 00000000 -----000 00000000 0000 413c h to 0000 4168 h ? 0000 416c h sosd_intc [r/w] w -------- -------- -----xxx -----xxx 0000 4170 h sosd_sbc0 [w] w 00000000 00000000 00000000 00000000 0000 4174 h sosd_sbc1 [w] w 00000000 00000000 00000000 00000000 0000 4178 h sosd_sbc2 [w] w 00000000 00000000 00000000 00000000 0000 417c h sosd_sbc3 [w] w 00000000 00000000 00000000 00000000
mb91610 series 52 ds07-16907-2e (continued) *1 : byte access is available only when accessing the lower 8 bits within 9 bits. *2 : the register of i 2 c can not be read immediate after reset. *3 : value just after reset by init pin. do not access the reserved areas. address register block + 0 + 1 + 2 + 3 0000 4180 h to 0000 41fc h ? reserved 0000 4200 h to 0000 43fc h mosd_pln [w] w *n: 0 to 127 00000000 00000000 00000000 00000000 osdc (main) 0000 4400 h mosd_osdc [w] w -------- --xx--xx ------xx ---x---x 0000 4404 h mosd_pllc [w] w --000000 00000000 00000000 ---00000 0000 4408 h to 0000 fffc h ? reserved
mb91610 series ds07-16907-2e 53 vector table (continued) interrupt source (peripheral resource) interrupt number interrupt level setting register offset address of tbr default deci- mal hexa- deci- mal reset 0 00 ? 3fc h 000f fffc h system reserved 1 01 ? 3f8 h 000f fff8 h system reserved 2 02 ? 3f4 h 000f fff4 h system reserved 3 03 ? 3f0 h 000f fff0 h system reserved 4 04 ? 3ec h 000f ffec h system reserved 5 05 ? 3e8 h 000f ffe8 h system reserved 6 06 ? 3e4 h 000f ffe4 h system reserved 7 07 ? 3e0 h 000f ffe0 h system reserved 8 08 ? 3dc h 000f ffdc h inte instruction 9 09 ? 3d8 h 000f ffd8 h instruction break exception 10 0a ? 3d4 h 000f ffd4 h operand break 11 0b ? 3d0 h 000f ffd0 h step trace trap 12 0c ? 3cc h 000f ffcc h system reserved 13 0d ? 3c8 h 000f ffc8 h undefined instruction exception 14 0e ? 3c4 h 000f ffc4 h ? 15 0f 15 (f h ) fixed 3c0 h 000f ffc0 h external interrupt request ch.0 to ch.7 16 10 icr00 3bc h 000f ffbc h external interrupt request ch.8 to ch.15 17 11 icr01 3b8 h 000f ffb8 h reserved 18 12 icr02 3b4 h 000f ffb4 h reserved 19 13 icr03 3b0 h 000f ffb0 h 16-bit reload timer ch.0 to ch.2 20 14 icr04 3ac h 000f ffac h reception interrupt request of uart/csio ch.0 21 15 icr05 3a8 h 000f ffa8 h transmission interrupt request of uart/csio ch.0 transmission bus idle interrupt request of uart/csio ch.0 22 16 icr06 3a4 h 000f ffa4 h reception interrupt request of uart/csio/ i 2 c ch.1 23 17 icr07 3a0 h 000f ffa0 h transmission interrupt request of uart/ csio/ i 2 c ch.1 transmission bus idle interrupt request of uart/csio ch.1 24 18 icr08 39c h 000f ff9c h status interrupt request of i 2 c ch.1 25 19 icr09 398 h 000f ff98 h
mb91610 series 54 ds07-16907-2e (continued) interrupt source (peripheral resource) interrupt number interrupt level setting register offset address of tbr default deci- mal hexa- deci- mal reception interrupt request of uart/csio/i 2 c ch.2 26 1a icr10 394 h 000f ff94 h transmission interrupt request of uart/csio/i 2 c ch.2 transmission bus idle interrupt request of uart/ csio ch.2 27 1b icr11 390 h 000f ff90 h status interrupt request of i 2 c ch.2 28 1c icr12 38c h 000f ff8c h reception interrupt request of uart/csio/i 2 c ch.3 29 1d icr13 388 h 000f ff88 h transmission interrupt request of uart/csio/i 2 c ch.3 transmission bus idle interrupt request of uart/ csio ch.3 status interrupt request of i 2 c ch.3 30 1e icr14 384 h 000f ff84 h reserved 31 1f icr15 380 h 000f ff80 h reserved 32 20 icr16 37c h 000f ff7c h reserved 33 21 icr17 378 h 000f ff78 h reserved 34 22 icr18 374 h 000f ff74 h reserved 35 23 icr19 370 h 000f ff70 h reserved 36 24 icr20 36c h 000f ff6c h reserved 37 25 icr21 368 h 000f ff68 h reserved 38 26 icr22 364 h 000f ff64 h reception interrupt request of uart/csio/i 2 c ch.8 to ch.11 transmission interrupt request of uart/csio/i 2 c ch.8 to ch.11 transmission bus idle interrupt request of uart/ csio ch.8 to ch.11 transmission fifo interrupt request uart/csio/ i 2 c ch.8 to ch.11 status interrupt request of i 2 c ch.8 to ch.11 39 27 icr23 360 h 000f ff60 h hdmi-cec/remote control reception 40 28 icr24 35c h 000f ff5c h main timer/sub timer/watch counter 41 29 icr25 358 h 000f ff58 h 10-bit a/d converter ? scan conversion interrupt request ? priority conversion interrupt request ? fifo overrun interrupt request ? conversion result compare interrupt request 42 2a icr26 354 h 000f ff54 h
mb91610 series ds07-16907-2e 55 (continued) interrupt source (peripheral resource) interrupt number interrupt level setting register offset address of tbr default deci- mal hexa- deci- mal 32-bit free run timer ch.0 43 2b icr27 350 h 000f ff50 h 32-bit input capture ch.0 to ch.3 44 2c icr28 34c h 000f ff4c h 32-bit output compare ch.0 to ch.3 45 2d icr29 348 h 000f ff48 h base timer ch.0 46 2e icr30 344 h 000f ff44 h base timer ch.1 47 2f icr31 340 h 000f ff40 h base timer ch.2 48 30 icr32 33c h 000f ff3c h base timer ch.3 49 31 icr33 338 h 000f ff38 h base timer ch.4, ch.5 50 32 icr34 334 h 000f ff34 h base timer ch.6, ch.7 51 33 icr35 330 h 000f ff30 h reserved 52 34 icr36 32c h 000f ff2c h osdc (main) 53 35 icr37 328 h 000f ff28 h usb function (drq of end point 1 to 5) 54 36 icr38 324 h 000f ff24 h usb function (drqi of end point 0, drqo and each status/ usb host (each status) 55 37 icr39 320 h 000f ff20 h osdc (sub) 56 38 icr40 31c h 000f ff1c h dma controller (dmac) ch.0 57 39 icr41 318 h 000f ff18 h dma controller (dmac) ch.1 58 3a icr42 314 h 000f ff14 h dma controller (dmac) ch.2 59 3b icr43 310 h 000f ff10 h dma controller (dmac) ch.3 60 3c icr44 30c h 000f ff0c h dma controller (dmac) ch.4 to ch.7 61 3d icr45 308 h 000f ff08 h system reserved 62 3e icr46 304 h 000f ff04 h delay interrupt 63 3f icr47 300 h 000f ff00 h system reserved (used by realos) 64 40 ? 2fc h 000f fefc h system reserved (used by realos) 65 41 ? 2f8 h 000f fef8 h used by int instruction 66 to 255 42 to ff ? 2f4 h to 000 h 000f fef4 h to 000f fc00 h
mb91610 series 56 ds07-16907-2e * : usb interrupt source number usb interrupt source details decimal hexadecimal 54 36 usb function (drq of end point 1 to 5) drq (end point1 to 5) 55 37 usb function (drqi, drqo of end point 0 and each status) drqi, drqo, spk, susp, sof, brst, conf, wkup usb host ( each status) dirq, urirq, rwkirq, cnnirq, sofirq, cmpirq
mb91610 series ds07-16907-2e 57 pin status in each cpu state ? when init = ?l? this is the period when the init pin is the ?l? level. ? when init = ?h? the status immediately after the init pin changes from the ?l? level to the ?h? level. ?slvl1 this bit is a standby level setting bit in the standby mode control register (stbcr) . ? input enabled indicates that the inpu t function can be used. ? input disabled indicates that the input function cannot be used. ? output hi-z indicates that the output drive transistor is disabled and the pin is put in the hi-z state. ? maintain previous state maintains the state that was being output imm ediately prior to entering the current mode. if a built-in peripheral function is operating , the output follows the peripheral function. if the pin is being used as a port, that output is maintained. ? internal input fixed at ?0? the input gate connected to the pin is disconnected from the external inpu t and internally connected to ?0?. ? input enabled when interrup t function selected and enabled inputs are allowed only when the pin is configured as an external interrupt request input pin and the external interrupt request is enabled.
mb91610 series 58 ds07-16907-2e ? list of pin status (continued) pin name function during initialization sleep mode standby mode init = ?l? init = ?h? slvl1 = 0slvl1 = 1 init init ?? input enabled input enabled input enabled x0 x0 input enabled input enabled hi-z/ input enabled hi-z/ input enabled x1 x1 input enabled input enabled "h" output/ input enabled "h" output/ input enabled x0a x0a (when init input, see pk1. when port selected, input disabled) input disabled input disabled hi-z/ input enabled hi-z/ input enabled x1a x1a (when init input, see pk0. when port selected, input disabled) input disabled input disabled "h" output/ input enabled "h" output/ input enabled md0 md0 input enabled input enabled input enabled input enabled md1 md1 input enabled input enabled p00 p00/tioa0/sout0_1/in0 output hi-z output hi-z input enabled maintain previous state maintain previous state output hi-z/ internal in- put fixed at "0" p01 p01/tiob0/sin0_1/in1 p02 p02/tioa1/sck0_1/in2 p03 p03/tiob1/in3 p04 p04/tioa2/sout1 p05 p05/tiob2/sin1 p06 p06/tioa3/sck1 p07 p07/tiob3 p10 p10/tioa4/sout2/int0 output hi-z output hi-z input enabled maintain previous state maintain previous state output hi-z/ internal input fixed at "0" input enabled when interrupt function selected and enabled p11 p11/tiob4/sin2/int1 p12 p12/tioa5/sck2/int2 p13 p13/tiob5/int3 p14 p14/tioa6/sout3/int4 p15 p15/tiob6/sin3/int5 p16 p16/tioa7/sck3/int6 p17 p17/tiob7/int7
mb91610 series ds07-16907-2e 59 * : analog input has a priority (digital input is disconnected) (continued) pin name function during initialization sleep mode standby mode init = ?l? init = ?h? slvl1 = 0slvl1 = 1 p20 p20/sout8 output hi-z output hi-z input en- abled maintain previous state maintain pre- vious state output hi-z/ internal input fixed at "0" p21 p21/sin8 p22 p22/sck8 p23 p23/rcin_1 p24 p24/sout9/out0 p25 p25/sin9/out1 p26 p26/sck9/out2 p27 p27/out3 p30 p30/sout10/int8 output hi-z output hi-z input enabled maintain previous state maintain previous state output hi-z/ internal input fixed at "0" input enabled when interrupt function selected and enabled p31 p31/sin10/int9 p32 p32/sck10/int10 p33 p33/int11 p34 p34/sout11/int12 p35 p35/sin11/int13 p36 p36/sck11/int14 p37 p37/int15 p50 p50 output hi-z output hi-z input enabled maintain previous state maintain previous state output hi-z/ internal input fixed at "0" p51 p51 p52 p52 p53 p53 p54 p54/rcin p55 p55/adtrg p56 p56/frck p57 p57 p70 p70/an0/out0_1 output hi-z output hi-z input enabled* maintain previous state maintain previous state output hi-z/ internal input fixed at "0" p71 p71/an1/out1_1 p72 p72/an2/tmo0/out2_1 p73 p73/an3/tmo1/out3_1 p74 p74/an4/tmo2 p75 p75/an5/sout0/tmi0 p76 p76/an6/sin0/tmi1 p77 p77/an7/sck0/tmi2 pk0 pk0 output hi-z output hi-z input enabled maintain previous state maintain previous state output hi-z/ internal input fixed at "0" pk1 p k1
mb91610 series 60 ds07-16907-2e (continued) pin name function during initialization sleep mode standby mode init = ?l? init = ?h? slvl1 = 0slvl1 = 1 udp udp(usb) output hi-z output hi-z input enabled maintain pre- vious state/ input enabled maintain previous state output hi-z/ internal input fixed at "0" udm udm(usb) dcki dcki input state input enabled input enabled input state input state dcko dcko l output l output/ dck output l output/ dck output l output (osdc stop) l output (osdc stop) vsync vsync input state input enabled input enabled input state input state hsync hsync r4 to r0 r4 to r0 l output l output/ r output l output/ r output l output (osdc stop) l output (osdc stop) g5 to g0 g5 to g0 l output/ g output l output/ g output b4 to b0 b4 to b0 l output/ b output l output/ b output voa2 to voa0 voa2 to voa0 l output/ voa output l output/ voa output vob vob l output/ vob output l output/ vob output rout rout l output/ rout output l output/ rout output gout gout l output/ gout output l output/ gout output bout bout l output/ bout output l output/ bout output hwde hwde input state input enabled input enabled input state input state
mb91610 series ds07-16907-2e 61 ? list of pin status (serial write mode) (continued) pin name function during initialization during asynchronous write operation during synchronous write operation init = ?l? init = ?h? init init ??? x0 x0 input enabled input enabled input enabled x1 x1 input enabled input enabled input enabled x0a x0a (when init input, see pk1. when port selected, input disabled) input disabled input disabled input disabled x1a x1a (when init input, see pk0. when port selected, input disabled) input disabled input disabled input disabled md0 md0 input enabled input enabled input enabled md1 md1 input enabled input enabled input enabled p00 p00/tioa0/sout0_1/in0 output hi-z output hi-z input enabled output hi-z input enabled p01 p01/tiob0/sin0_1/in1 p02 p02/tioa1/sck0_1/in2 p03 p03/tiob1/in3 p04 p04/tioa2/sout1 p05 p05/tiob2/sin1 p06 p06/tioa3/sck1 p07 p07/tiob3 p10 p10/tioa4/sout2/int0 output hi-z output hi-z input enabled output hi-z input enabled p11 p11/tiob4/sin2/int1 p12 p12/tioa5/sck2/int2 p13 p13/tiob5/int3 p14 p14/tioa6/sout3/int4 p15 p15/tiob6/sin3/int5 p16 p16/tioa7/sck3/int6 p17 p17/tiob7/int7 p20 p20/sout8 output hi-z output hi-z input enabled output hi-z input enabled p21 p21/sin8 p22 p22/sck8 p23 p23/rcin_1 p24 p24/sout9/out0 p25 p25/sin9/out1 p26 p26/sck9/out2 p27 p27/out3
mb91610 series 62 ds07-16907-2e (continued) pin name function during initialization during asynchronous write operation during synchronous write operation init = ?l? init = ?h? p30 p30/sout10/int8 output hi-z output hi-z input enabled output hi-z input enabled p31 p31/sin10/int9 p32 p32/sck10/int10 p33 p33/int11 p34 p34/sout11/int12 p35 p35/sin11/int13 p36 p36/sck11/int14 p37 p37/int15 p50 p50 output hi-z output hi-z input enabled output hi-z input enabled p51 p51 p52 p52 p53 p53 p54 p54/rcin p55 p55/adtrg p56 p56/frck p57 p57 p70 p70/an0/out0_1 output hi-z output hi-z input enabled output hi-z input enabled p71 p71/an1/out1_1 p72 p72/an2/tmo0/out2_1 p73 p73/an3/tmo1/out3_1 p74 p74/an4/tmo2 p75 p75/an5/sout0/tmi0 output output p76 p76/an6/sin0/tmi1 output hi-z input enabled output hi-z input enabled p77 p77/an7/sck0/tmi2 pk0 pk0 output hi-z output hi-z input enabled output hi-z input enabled pk1 pk1 udp udp (usb) output hi-z output hi-z input enabled output hi-z input enabled udm udm (usb) dcki dcki input state input enabled input enabled dcko dcko l output l output l output vsync vsync input state input enabled input enabled hsync hsync
mb91610 series ds07-16907-2e 63 (continued) pin name function during initialization during asynchronous write operation during synchronous write operation init = ?l? init = ?h? r4 to r0 r4 to r0 l output l output l output g5 to g0 g5 to g0 b4 to b0 b4 to b0 voa2 to voa0 voa2 to voa0 vob vob rout rout l output l output l output gout gout bout bout hwde hwde input state input enabled input enabled
mb91610 series 64 ds07-16907-2e electrical characteristics 1. absolute maximum ratings *1 : the parameter is based on v ss = av ss = 0.0 v. *2 : v cc must not drop below v ss ? 0.3 v. *3 : be careful not to exceed v cc + 0.3 v, for example, when the power is turned on. *4 : the maximum output current is the peak value for a single pin. *5 : the average output is the average curren t for a single pin over a period of 100 ms. (continued) parameter symbol rating unit remarks min max power supply voltage* 1 , * 2 v cc vss ? 0.3 vss + 4.0 v analog power supply voltage* 1 , * 3 av cc vss ? 0.3 vss + 4.0 v analog reference voltage* 1 , * 3 avrh vss ? 0.3 vss + 4.0 v input voltage* 1 v i vss ? 0.3 vcc + 0.3 ( 4.0) v*7 vss ? 0.3 vss + 6.0 v 5 v tolerant vss ? 0.5 vss + 4.5 v usb i/o analog pin input voltage* 1 v ia vss ? 0.3 vss + 4.0 v output voltage* 1 v o vss ? 0.3 vcc + 0.3 v vss ? 0.5 vss + 4.5 v usb i/o maximum clamp current i clamp ? 4 + 4ma*8 total maximum clamp current |i clamp | ? 40 ma *8 ?l? level maximum output current* 4 i ol ? 10 ma ? 43 ma usb i/o ?l? level average output current* 5 i olav ? 4ma ? 15 ma usb i/o ?l? level total maximum output current i ol ? 100 ma ?l? level total average output current* 6 i olav ? 50 ma ?h? level maximum output current* 4 i oh ? ? 10 ma ? ? 43 ma usb i/o ?h? level average output current* 5 i ohav ? ? 4ma ? ? 15 ma usb i/o ?h? level total maximum output current* 6 i oh ? ? 100 ma ?h? level total average output current i ohav ? ? 50 ma power consumption (flash product) p d ? 850 mw power consumptio n (mask product) ? 600 mw operating temperature ta ? 40 + 85 c storage temperature t stg ? 55 + 125 c
mb91610 series ds07-16907-2e 65 (continued) *6 : the total average output current is the aver age current for all pins over a period of 100 ms. *7 : if the input current or the maximu m input current are limited by some means with external components, the i clamp rating supersedes the v i rating. *8 : ? corresponding pins:p14 to p17,p2 0 to p27,p30 to p37,p50 to p57 ? use within recommended operating conditions. ? use at dc voltage (current). ? the +b signal should always be ap plied by connecting a limiting resi stor between the +b signal and the microcontroller. ? the value of the limiting resistor should be set so that the current i nput to the microcontroller pin does not exceed rated values at any time re gardless of instantaneously or const antly when the +b signal is input. ? note that when the microcontroller drive current is lo w, such as in the low power consumption modes, the +b input potential can increa se the potential at the v cc pin via a protective diode, possibly affecting other devices. ? note that if the +b signal is input when the microcontroller is off (not fi xed at 0v), since the power is supplied through the pin, the microcontroller may operate incompletely. ? do not leave +b input pins open. ? sample recommended circuit warning: semiconductor devices can be permanently dama ged by application of stress (voltage, current, temperature, etc.) in excess of absolute ma ximum ratings. do not exceed these ratings. p-ch n-ch vcc r ?input/output equivalent circuit +b input (0 v to 16 v) limiting resistor protective diode i clamp
mb91610 series 66 ds07-16907-2e 2. recommended operating conditions (v ss = av ss = 0.0 v) warning: the recommended operating conditions are requir ed in order to ensure the normal operation of the semiconductor device. all of the device?s electrical characteristics are warranted when the device is operated within these ranges. always use semiconductor devices within their recommended operating cond ition ranges. operation outside these ranges may adversely affect re liability and could result in device failure. no warranty is made with respect to uses, operat ing conditions, or combinations not represented on the data sheet. users considering application outside the listed conditions are advised to contact their representatives beforehand. parameter symbol value unit remarks min typ max power supply voltage v cc 3.0 ? 3.6 v analog power supply voltage av cc 3.0 ? 3.6 v av cc v cc analog reference voltage avrh av ss ? av cc v smoothing capacitor cs ? 4.7 ? f operating temperature ta ? 40 ? + 85 c ? c pin connection diagram c s c this series
mb91610 series ds07-16907-2e 67 3. dc characteristics (1) dc characteristics (v cc = av cc = 3.0 v to 3.6 v, v ss = av ss = 0 v, ta = ? 40 c to + 85 c) * : ta = + 25 c and v cc = 3.3 v (continued) parameter sym- bol pin name conditions value unit remarks min typ max power supply current (flash product) i cc v cc normal operation ? 45 60 ma osdc stopped not using usb cpu : 33 mhz, peripheral : 33 mhz ? 55 75 ma osdc stopped us- ing usb cpu : 32 mhz, peripheral : 32 mhz i cco ? 100 130 ma dot clock 50 mhz (pll) dot clock pll is used analog rgb dac is used digital rgb is not used cpu : 33 mhz, peripheral : 33 mhz ? 105 150 ma dot clock 75 mhz (pll) dot clock pll is used analog rgb dac is not used digital rgb is used cpu : 33 mhz, peripheral:33 mhz i ccs sleep mode ? 15 25 ma osdc stopped not using usb peripheral : 33 mhz ? 25 40 ma osdc stopped us- ing usb peripheral : 32 mhz i ccl sub operation* ? 150 550 a cpu : 32 khz peripheral : 32 khz i cct watch mode* ? 120 450 a i cch stop mode* ? 65 320 a
mb91610 series 68 ds07-16907-2e (v cc = av cc = 3.0 v to 3.6 v, v ss = av ss = 0 v, ta = ? 40 c to + 85 c) * : ta = + 25 c and v cc = 3.3 v (continued) parameter sym- bol pin name conditions value unit remarks min typ max power supply current (mask product) i cc v cc normal operation ? 35 45 ma osdc stopped not using usb cpu : 33 mhz, peripheral : 33 mhz ? 50 60 ma osdc stopped us- ing usb cpu : 32 mhz, peripheral : 32 mhz i cco ? 80 100 ma dot clock 50 mhz (pll) dot clock pll is used analog rgb dac is used digital rgb is not used cpu : 33 mhz, peripheral : 33 mhz ? 80 110 ma dot clock 75 mhz (pll) dot clock pll is used analog rgb dac is not used digital rgb is used cpu : 33 mhz, peripheral:33 mhz i ccs sleep mode ? 15 25 ma osdc stopped not using usb peripheral : 33 mhz ? 25 40 ma osdc stopped us- ing usb peripheral : 32 mhz i ccl sub operation* ? 150 550 a cpu : 32 khz peripheral : 32 khz i cct watch mode* ? 120 450 a i cch stop mode* ? 65 320 a
mb91610 series ds07-16907-2e 69 (v cc = av cc = 3.0 v to 3.6 v, v ss = av ss = 0 v, ta = ? 40 c to + 85 c) (continued) parameter sym- bol pin name conditions value unit remarks min typ max ?h? level input voltage (hysteresis input) v ihs p00 to p07, p10 to p17, p50 to p57, p70 to p77, pk0, pk1, dcki, vsync, hsync, init , md0, md1 ? v cc 0.8 ? v cc + 0.3 v p20 to p27, p30 to p37 ? v cc 0.8 ? v ss + 5.5 v 5 v tolerant ? l ?level input voltage (hysteresis input) v ils p00 to p07, p10 to p17, p20 to p27, p30 to p37, p50 to p57, p70 to p77, pk0, pk1, dcki, vsync, hsync, init , md0, md1 ? vss ? 0.3 ? v cc 0.2 v ?h? level output voltage v oh p00 to p07, p10 to p17, p20 to p27, p30 to p37, p50 to p57, p70 to p77, pk0, pk1, r0 to r4, g0 to g5, b0 to b4, voa0 to voa2, vob, dcko v cc = 3.0 v i oh = ? 4 ma v cc ? 0.5 ? v cc v ?l? level output voltage v ol v cc = 3.0 v i ol = 4 ma v ss ? 0.4 v input leak current i il ?? ? 5 ? + 5 a digital pin ? 10 ? + 10 a analog pin pull-up resistance value r pu pull-up pin ? 16.6 33 66 k pull-down resistance value r pd ibreak icd0 to icd3 ? 16.6 33 66 k MB91F610A only input capacitance c in other than v cc , v ss , av cc , av ss , avrh ?? 10 15 pf
mb91610 series 70 ds07-16907-2e (continued) (v cc = av cc = 3.0 v to 3.6 v, v ss = av ss = 0 v, ta = ? 40 c to + 85 c) parameter sym- bol pin name conditions value unit remarks min typ max analog rgb reference voltage v ref vref ? 1.05 1.10 1.15 v analog rgb reference resistance r ref vro-vssd ? 2.4 2.7 ? k analog rgb external load resistance r l rout, gout, bout ?? 150 160
mb91610 series ds07-16907-2e 71 4. ac characteristics (1) main clock (mclk) input standard (v cc = av cc = 3.0 v to 3.6 v, v ss = av ss = 0 v, ta = ? 40 c to + 85 c) parameter symbol pin name conditions value unit remarks min max input frequency f ch x0, x1 ? 448mhz when crystal oscilla- tor is connected ? 448mhz when using external clock input clock cycle t cylh ? 20.83 250 ns when using external clock input clock pulse width ? p wh /t cylh p wl /t cylh 45 55 % when using external clock input clock rise time and fall time t cf t cr ?? 5ns when using external clock internal operating clock frequency f cs ??? 33 mhz source clock f cc ??? 33 mhz cpu clock f cp ??? 33 mhz peripheral bus clock internal operating clock cycle time t cycs ?? 30 ? ns source clock t cycc ?? 30 ? ns cpu clock t cycp ?? 30 ? ns peripheral bus clock
mb91610 series 72 ds07-16907-2e ? operating guaranteed ra nge (not using usb) ? when the main clock is selected (divb=000) 2.4 2.7 3.0 3.3 3.6 02468 10 12 14 16 1 8 20 22 24 26 2 83 0 32 34 internal operation clock fcc (mhz) ? when the pll clock is selected (divb=000) ? when the sub clock is selected 2.4 2.7 3.0 3.3 3.6 0123 45678 9 1011121 3 14 15 16 17 1 8 19 20 21 22 2 3 24 25 26 27 2 8 29 30 31 32 33 3 4 35 power supply voltage vcc (v) internal operation clock fcc (mhz) 2.4 2.7 3.0 3.3 3.6 048 12 16 20 24 2 83 2 internal operation clock fcc (khz) power supply voltage vcc (v) power supply voltage vcc (v)
mb91610 series ds07-16907-2e 73 ? operating guaranteed range (at using usb) *1 : the values other than divb = 000 are omitted. *2 : the values other than pds = 0000, 0001,0010 are omitted. *3 : the values other than ods = 10 are omitted. *4 : the values other than pms = 0001,0111 are omitted. note: divb : base clock division configuration bit ods : pll macro oscillation clock division rate select bit pds : pll input clock division select bit pms : pll clock multiple rate select bit ? when the main clock is selected (divb=000* 1 ) 2.4 2.7 3.0 3.3 3.6 0 2468 10 12 14 16 1 8 20 22 24 26 2 83 0 32 34 internal operation clock fcc (mhz) ? when the pll clock is selected (divb=000* 1 , ods=10* 3 , pms=0111* 4 , pds=0000* 2 , x0=4 mhz or divb=000* 1 , ods=10* 3 , pms=0001* 4 , pds=0010* 2 , x0=48 mhz) 0 4 8 12 16 20 24 2 83 2 2.4 2.7 3.0 3.3 3.6 internal operation clock fcc (mhz) power supply voltage vcc (v) power supply voltage vcc (v)
mb91610 series 74 ds07-16907-2e (2) sub clock (sbclk) input standard (v cc = av cc = 3.0 v to 3.6 v, v ss = av ss = 0 v, ta = ? 40 c to + 85 c) parameter symbol pin name conditions value unit remarks min typ max input frequency f cl x0a, x1a ?? 32.768 ? khz when crystal oscillator is connected ?? 32.768 ? khz when using external clock input clock cycle t cyll ?? 30.518 ? s when using external clock input clock pulse width ? p wh / t cyll p wl / t cyll 45 ? 55 % when using external clock input clock rise time and fall time t cf t cr ??? 200 ns when using external clock x0 x0a 0.8 v cc 0.8 v cc 0.2 v cc 0.8 v cc 0.2 v cc t cylh, t cyll p wh p wl t cf t cr
mb91610 series ds07-16907-2e 75 (3) conditions of pll (v cc = av cc = 3.0 v to 3.6 v, v ss = av ss = 0 v, ta = ? 40 c to + 85 c) (4) regulator voltage stabilization wait time (v cc = av cc = 3.0 v to 3.6 v, v ss = av ss = 0 v, ta = ? 40 c to + 85 c) note : this is the time from when the external power supply stabilizes (after reaching 3.0 v). (5) reset input standards (v cc = av cc = 3.0 v to 3.6 v, v ss = av ss = 0 v, ta = ? 40 c to + 85 c) * : after the supply voltage has stabilized, it takes a further 50 s until the internal supply stabilizes. hold the input to the init pin during that period. ? at power-on ? when in stop mode ? when in sub mode and sub watch mode when the main oscillation is stopped. parameter symbol value unit remarks min typ max pll oscillation stabilization wait time (lock up time) t lock 600 ?? s time from when the pll starts operating until the oscillation stabilizes pll oscillation stabilization wait time for osdc (lock up time) t l 10 ?? ms pll input clock frequency f plli 4 ? 24 mhz pll multiple rate ? 4 ? 24 multiplied by ods pms pll macro oscillation clock frequency f pllo 96 ? 100 mhz parameter symbol value unit remarks min max regulator voltage stabilization wait time t reg 50 ? s time taken for the regulator voltage to stabilize parameter symbol pin name condi- tions value unit remarks min max reset input time (at power-on, main oscillation stop mode) t initx init ? oscillation time of oscillator + 10 t cylh ? ns * reset input time (at other times) 10 t cylh ? ns reset input rise time and fall time t initxf t initxr ? 10 ms init t initx v ils v ils t initxr t initxf v ihs v ihs
mb91610 series 76 ds07-16907-2e (6) base timer input timing ? timer input timing (v cc = av cc = 3.0 v to 3.6 v, v ss = av ss = 0 v, ta = ? 40 c to + 85 c) ? trigger input timing (v cc = av cc = 3.0 v to 3.6 v, v ss = av ss = 0 v, ta = ? 40 c to + 85 c) parameter symbol pin name condi- tions value unit min max input pulse width t tiwh t tiwl tioan/tiobn (when used as eck, tin) ? 2 t cycp ? ns parameter symbol pin name condi- tions value unit min max input pulse width t trgh t trgl tioan/tiobn (when used as tgin) ? 2 t cycp ? ns eck tin t tiwh t tiwl v ihs v ihs v ils v ils v ihs t trgh t trgl v ihs v ils v ils tgin
mb91610 series ds07-16907-2e 77 (7) synchronous serial (csio) timing (v cc = av cc = 3.0 v to 3.6 v, v ss = av ss = 0 v, ta = ? 40 c to + 85 c) ? synchronous serial (spi = 0, scinv = 0) notes: ? the above standards apply to clk synchronous mode. ?t cycp indicates the peripheral clock cycle time. ? when the external load capacitance c = 50 pf. parameter symbol pin name conditions value unit min max serial clock cycle time t scyc sckn internal shift clock operation 4t cycp ? ns sck sout delay time t slovi sckn soutn ? 30 + 30 ns sin sck setup time t ivshi sckn sinn 57 ? ns sck sin hold time t shixi sckn sinn 0 ? ns serial clock ?l? pulse width t slsh sckn external shift clock operation 2t cycp ? 10 ? ns serial clock ?h? pulse width t shsl sckn t cycp + 10 ? ns sck sout delay time t slove sckn soutn ? 48 ns sin sck setup time t ivshe sckn sinn 25 ? ns sck sin hold time t shixe sckn sinn 20 ? ns sck fall time t f sckn ? 5ns sck rise time t r sckn ? 5ns t scyc t s lovi v oh v ol v oh v ol t ivshi t shixi v ils v ihs v ihs v ils v ol sck sout sin ms bit = 0
mb91610 series 78 ds07-16907-2e ? synchronous serial (spi = 0, scinv = 1) notes: ? the above standards apply to clk synchronous mode. ?t cycp indicates the peripheral clock cycle time. ? when the external load capacitance c = 50 pf. parameter sym- bol pin name conditions value unit min max serial clock cycle time t scyc sckn internal shift clock operation 4t cycp ? ns sck sout delay time t shovi sckn soutn ? 30 + 30 ns sin sck setup time t ivsli sckn sinn 57 ? ns sck sin hold time t slixi sckn sinn 0 ? ns serial clock ?l? pulse width t slsh sckn external shift clock operation 2t cycp ? 10 ? ns serial clock ?h? pulse width t shsl sckn t cycp + 10 ? ns sck sout delay time t shove sckn soutn ? 48 ns sin sck setup time t ivsle sckn sinn 25 ? ns sck sin hold time t slixe sckn sinn 20 ? ns sck fall time t f sckn ? 5ns sck rise time t r sckn ? 5ns v ihs v ih s v ihs v il s v ils v ihs v ihs sck sout sin v ils v oh v ol v ils t ivshe t shixe t s love t f t r t shsl t slsh ms bit = 1
mb91610 series ds07-16907-2e 79 t scyc t s hovi t ivsli t slixi v oh v oh v oh v ol v ol v ihs v ils v ihs v ils sck sout sin ms bit = 0 t s hove t r t f v ihs v ils v ihs v oh v ol v ils v ils v ihs v ih s v ils v il s t ivsle t slixe sck sout sin t slsh t shsl ms bit = 1
mb91610 series 80 ds07-16907-2e ? synchronous serial (spi = 1,scinv = 0) notes: ? the above standards apply to clk synchronous mode. ?t cycp indicates the peripheral clock cycle time. ? when the external load capacitance c = 50 pf. parameter symbol pin name conditions value unit min max serial clock cycle time t scyc sckn internal shift clock operation 4t cycp ? ns sck sout delay time t shovi sckn soutn ? 30 + 30 ns sin sck setup time t ivsli sckn sinn 57 ? ns sck sin hold time t slixi sckn sinn 0 ? ns sout sck delay time t sovli sckn soutn 2t cycp ? 30 ? ns serial clock ?l? pulse width t slsh sckn external shift clock operation 2t cycp ? 10 ? ns serial clock ?h? pulse width t shsl sckn t cycp + 10 ? ns sck sout delay time t shove sckn soutn ? 48 ns sin sck setup time t ivsle sckn sinn 25 ? ns sck sin hold time t slixe sckn sinn 20 ? ns sck fall time t f sckn ? 5ns sck rise time t r sckn ? 5ns sck t s hovi v ol v ol v oh v oh v ol v ihs v ils v ihs v ils v oh v ol sout sin t scyc t s ovli t ivsli t slixi ms bit = 0
mb91610 series ds07-16907-2e 81 ? synchronous serial (spi = 1, scinv = 1) notes: ? the above standards apply to clk synchronous mode. ?t cycp indicates the peripheral clock cycle time. ? when the external load capacitance c = 50 pf. parameter sym- bol pin name conditions value unit min max serial clock cycle time t scyc sckn internal shift clock operation 4t cycp ? ns sck sout delay time t slovi sckn soutn ? 30 + 30 ns sin sck setup time t ivshi sckn sinn 57 ? ns sck sin hold time t shixi sckn sinn 0 ? ns sout sck delay time t sovhi sckn soutn 2t cycp ? 30 ? ns serial clock ?l? pulse width t slsh sckn external shift clock operation 2t cycp ? 10 ? ns serial clock ?h? pulse width t shsl sckn t cycp + 10 ? ns sck sout delay time t slove sckn soutn ? 48 ns sin sck setup time t ivshe sckn sinn 25 ? ns sck sin hold time t shixe sckn sinn 20 ? ns sck fall time t f sckn ? 5ns sck rise time t r sckn ? 5ns sck v oh * v ihs v ihs v ihs v ils t f t r v ils v ils v ol v oh v ol v ihs v ils v ihs v ils sout sin t ivsle t slixe t s hove t slsh t shsl ms bit = 1 * : changes when writing to tdr register
mb91610 series 82 ds07-16907-2e ? external clock (ext = 1) : asynchronous only parameter symbol conditions value unit min max serial clock ?l? pulse width t slsh c l = 50 pf t cycp + 10 ? ns serial clock ?h? pulse width t shsl t cycp + 10 ? ns sck fall time t f ? 5ns sck rise time t r ? 5ns sck v oh v ol v oh v oh v oh v ol v ol v ihs v ils v ihs v ils sout sin t scyc t s ovhi t ivshi t shixi t s lovi ms bit = 0 sck v oh v ihs v ils v ils v ihs v ihs v ol v ils v oh v ol v ihs v ils v ihs v ils sout sin t r t f t shsl t slsh t s love t shixe t ivshe ms bit = 1 t shsl t r t f sck v ihs v ihs v ihs v ils v ils v ils t slsh
mb91610 series ds07-16907-2e 83 (8) free-run timer clock, reload timer even t input,input capture input , interrupt input timing (v cc = av cc = 3.0 v to 3.6 v, v ss = av ss = 0 v, ta = ? 40 c to + 85 c) *1 : t cycp indicates peripheral clock cycle time, except when in stop mode, in main timer mode and in watch mode. *2 : when in stop mode, in main timer mode, or in watch mode. (9) a/d converter trigger input timing (v cc = av cc = 3.0 v to 3.6 v, v ss = av ss = 0 v, ta = ? 40 c to + 85 c) * : t cycp indicates peripheral clock cycle time. parameter symbol pin name condi- tions value unit remarks min max input pulse width t tiwh t tiwl frck tmin inn ? 2 t cycp ? ns *1 intn ? 3 t cycp ? ns *1 ? 1.0 ? s*2 parameter symbol pin name condi- tions value unit remarks min max a/d converter trigger input t tadtgl t tadtgh adtrg ? 2 t cycp ? ns * t tiwl t tiwh v ils v ils v ihs v ihs frck tmin inn intn t tadtgl t tadtgh v ihs v ils adtrg v ils v ihs
mb91610 series 84 ds07-16907-2e (10) i 2 c timing (v cc = av cc = 3.0 v to 3.6 v, v ss = av ss = 0 v, ta = ? 40 c to + 85 c) *1 : r and c represent the pull-up resi stance and load capacitan ce of the scl and sda lines, respectively. vp indicates the power supply voltage of the pull-up resistance and i ol indicates v ol guaranteed current. *2 : the maximum t hddat must satisfy that it doesn' t extend at least ?l? period (t low ) of device's scl signal. *3 : a high-speed mode i 2 c bus device can be used on a standard mode i 2 c bus system as long as the device satisfies the requirement of ?t sudat 250 ns?. *4 : t cycp is the peripheral clock cycle time. to use i 2 c, set the peripheral bus clock at 8 mhz or more. parameter symbol pin name condi- tions typical mode high-speed mode* 3 unit min max min max scl clock frequency f scl sckn (scln) c l = 50 pf, r = (vp/i ol ) * 1 01000400khz ?(repeated) start condition? hold time sda scl t hdsta soutn (sdan) sckn (scln) 4.0 ? 0.6 ? s scl clock ?l? width t low sckn (scln) 4.7 ? 1.3 ? s scl clock ?h? width t high sckn (scln) 4.0 ? 0.6 ? s ?repeated start condition? setup time scl sda t susta sckn (scln) 4.7 ? 0.6 ? s data hold time scl sda t hddat soutn (sdan) sckn (scln) 0 3.45* 2 00.9* 3 s data setup time sda scl t sudat soutn (sdan) sckn (scln) 250 ? 100 ? ns ?stop condition? setup time scl sda t susto soutn (sdan) sckn (scln) 4.0 ? 0.6 ? s bus free time between ?stop condition? and ?start condition? t buf ? 4.7 ? 1.3 ? s noise filter t sp ?? 2 t cycp * 4 ? 2 t cycp * 4 ? ns
mb91610 series ds07-16907-2e 85 (11) analog rgb (v cc = av cc = 3.0 v to 3.6 v, v ss = av ss = 0 v, ta = ? 40 c to + 85 c) * : vro is an external resistance for dac. parameter sym- bol pin name conditions value unit remarks min typ max analog rgb output delay t vad rout, gout, bout vref = 1.1 v, vddd = 3.3 v, vro* = 2.7 k ? 12 ? ns 50 mhz (max) analog rgb output settling time t vas ?? 20 ns sda scl t hdsta t hddat t hdsta t susto t susta t high t s udat t low t buf t sp ? display signal output timing rout gout bout dcki t vad 1 lsb 1 lsb t va s
mb91610 series 86 ds07-16907-2e (12) digital rgb vertical synchronous/ horizontal synchronous/ display output control signal input timing (v cc = av cc = 3.0 v to 3.6 v, v ss = av ss = 0 v, ta = ? 40 c to + 85 c) * : h stands for the horizontal synchr onous signal. 1 synchronous is 1 unit. parameter symbol pin name value unit remarks min max horizontal synchronous signal cycle time t hcyc hsync 100 + t wh ? dot clock horizontal synchronous signal pulse width t wh hsync 20 ? dot clock ? 6 s horizontal synchronous signal setup time t dhst hsync 4 ? ns horizontal synchronous signal hold time t dhhd 0 ? ns vertical synchronous signal setup time t hvst vsync 5 ? dot clock vertical synchronous signal hold time t hvhd 1h ? 5 ? dot clock * input synchronous signal rising/ falling time t dr t df hsync, vsync ? 2ns t dhst 0.8 v cc 0.8 v cc 0.2 v cc 0.8 v cc 0.2 v cc 0.2 v cc t dr, t df t dhhd hsync dcki ? horizontal synchronous signal and disp lay output control signal input timing
mb91610 series ds07-16907-2e 87 0.8 v cc 0.2 v cc 0.8 v cc 0.2 v cc t dr t df 0.8 v cc 0.2 v cc t wh t hvhd t hvst 0.8 v cc 0.2 v cc t dr t df hsync vsync 0.8 v cc 0.2 v cc 0.8 v cc 0.2 v cc t dr t df 0.8 v cc 0.2 v cc t wh t hvhd t hvst 0.8 v cc 0.2 v cc t dr t df hsync vsync 0.8 v cc 0.8 v cc 0.2 v cc t wh t hcyc 0.8 v cc 0.2 v cc t dr t df hsync ? horizontal synchronous signal input ? vertical synchronous signal input timing ? detect vsync at hsync leading edge ? detect vsync at hsync trailing edge
mb91610 series 88 ds07-16907-2e (13) display signal timing (v cc = av cc = 3.0 v to 3.6 v, v ss = av ss = 0 v, ta = ? 40 c to + 85 c) *1 : input continuous signal to the dot clock. *2 : output load 16 pf note: actual display output varies depe nding on what is controlled, such as display output control and display location control in each display layer. parameter symbol pin name value unit remarks min max dot clock input cycle time t dif dcki 8 75 mhz *1 dot clock input pulse width t diwh dcki 5 ? ns *1 t diwl 5 ? ns dot clock output delay time1 t pdcs dcko 2.2 8 ns *2 display signal output delay time i1 t pdi1 r0 to r4, g0 to g5, b0 to b4, vob, voa0 to voa2 28.3ns*2 display signal output delay time o1 t pdo1 ?4 + 5ns*2 dcki dcko r0 to r4 g0 to g5 b0 to b4 vob voa0 to voa2 t pdcs t dif t diwh t diwl t pdo1 t pdi1 t pdcs 0.8 v cc 0.8 v cc 0.2 v cc 0.2 v cc 0.8 v cc 0.2 v cc 0.8 v cc 0.2 v cc ? display signal output timing
mb91610 series ds07-16907-2e 89 5. electrical characteristics for the a/d converter (v cc = av cc = 3.0 v to 3.6 v, v ss = av ss = 0 v, ta = ? 40 c to + 85 c) *1 : depending on the clock cycle supplied to peripheral resources. ensure that it satisfies the value; pclk cycle more than 4 + the value calculated from (equation 1). the condition of the minimum conversion time is when pclk = 33 mhz, the value of sampling time: 0.424 s, external impedance: 1.4 k or less and compare time: 0.72 s. (continued) parameter pin name value unit remarks min typ max resolution ??? 10 bit total error ? ? 5 ? + 5lsb av cc = 3.3 v, avrh = 3.3 v linearity error ? ? 3.5 ? + 3.5 lsb differential linearity error ? ? 3 ? + 3lsb zero transition voltage an0 to an7 ? 1.5 + 0.5 + 4lsb full transition voltage an0 to an7 avrh ? 4 avrh ? 1.5 avrh + 0.5 lsb compare time ? 0.72* 3 ?? spclk = 33 mhz conversion time ? 1.2* 1 ?? spclk = 33 mhz power supply current (analog + digital) av cc ?? 3.5 ma d/a stopped ?? 11 a at power-down* 2 reference power supply current (between avrh and av ss ) avrh ?? 0.6 ma avrh = 3.0 v ?? 5 a at power-down* 2 analog input capacity ??? 8.5 pf interchannel disparity ??? 4lsb analog port input current an0 to an7 ?? 10 a analog input voltage an0 to an7 av ss ? avrh v standard voltage avrh av ss ? av cc v
mb91610 series 90 ds07-16907-2e (continued) *2 : the current when the cpu is in stop mode and the a/d converter is not operating. *3 : compare time = {(ct + 1) 10 + 4} peripheral clock (pclk) period. (ct indicates compare time setting bits.) the condition of the minimum compare time is when ct = 1 and pclk = 33 mhz. the output impedance of the external circuit connected to the analog input affects the sampling time of the a/d converter. design the output impedance of the output circuit such that the required sampling time is less than the value of t s calculated from the following equation. (equation 1) ts = (rin + rext) cin 8 ts : sampling time rin : input resistance of a/d = 5.3 k cin : input capacitance of a/d = 8.5 pf rext : output impedance of external circuit if the sampling time is set as 600 ns, 600 ns (5.3 k + rext) 8.5 pf 8 rext 3.5 k and the impedance of the external ci rcuit therefore needs to be 3.5 k or less. rin cin rext analog signal source comparator rin cin approx. 5.3 k approx. 8.5 pf an0 to an7 analog input pin
mb91610 series ds07-16907-2e 91 ? definition of 10-bit a/d converter terms ? resolution : analog variation that is recognized by an a/d converter. ? linearity error : deviation of the line between the zero-transition point (0000000000 0000000001) and the full-sca le transition point (1111111110 1111111111) from the actual conversion characteristics. ? differential linearity error : deviation from the ideal value of the input vo ltage that is required to change the output code by 1 lsb. ? total error : difference between the actual value and the theoretical value. the total error includes zero transition error, full-scale transition error, and linear error. (continued) 3ff h 3fe h 3fd h 004 h 003 h 002 h 001 h av ss avrh {1 lsb (n ? 1) + v ot } (n ? 1) h av ss avr h (n ? 2) h n h (n + 1) h v fst v nt v ot v (n+1)t v nt linearity error differential linearity error digital output digital output actual conversion characteristics actual conversion characteristics ideal characteristics (actually- measured value) actual conversion characteristics actual conversion characteristics (actually-measured value) (actually-measured value) ideal characteristics (actually-measured value) (actually-measured value) analog input analog input n : a/d converter digital output value. v ot : voltage at which the digi tal output changes from 000 h to 001 h . v fst : voltage at which the digi tal output changes from 3fe h to 3ff h . v nt : voltage at which the digi tal output changes from (n ? 1) h to n h . linearity error of digital output n = v nt ? {1 lsb (n ? 1) + v ot } [lsb] 1 lsb' differential linearity error of digital output n = v ( n + 1 ) t ? v nt ? 1 [lsb] 1 lsb 1 lsb = v fst ? v ot 1022
mb91610 series 92 ds07-16907-2e (continued) 3ff h 3fe h 3fd h 004 h 003 h 002 h 001 h av ss avrh 1.5 lsb' 0.5 lsb' {1 lsb' (n ? 1) + 0.5 lsb'} v nt total error digital output actual conversion characteristics actual conversion characteristics (actually-measured value) ideal characteristics analog input n : a/d converter digital output value. v nt : voltage at which the digi tal output changes from (n + 1) h to n h . v ot ? (ideal value) = av ss + 0.5 lsb [v] v fst ? (ideal value) = avrh ? 1.5 lsb [v] 1 lsb' (ideal value) = avrh ? av ss [v] 1024 total error of digital output n = v nt ? {1 lsb' (n ? 1) + 0.5 lsb'} 1 lsb'
mb91610 series ds07-16907-2e 93 6. electrical characteristics for the analog rgb d/a converter (v cc = av cc = 3.0 v to 3.6 v, v ss = av ss = 0 v, ta = ? 40 c to + 85 c) parameter value unit remarks min typ max resolution ?? 5 bit rout, bout ?? 6 bit gout linearity error ? 2.0 ? + 2.0 lsb when the output is unloaded differential linearity error ? 1.0 ? + 1.0 lsb when the output is unloaded analog output impedance ? 250 ? k analog output < 1.0 v analog current (r/b/gout) 4.5 5.2 5.8 ma full-scale 022 0 a zero-scale power supply current (vddd) ? 25 27 ma vref = 1.1 v
mb91610 series 94 ds07-16907-2e 7. usb characteristics (v cc = av cc = 3.0 v to 3.6 v, v ss = av ss = 0 v, ta = ? 40 c to + 85 c) *1 : the switching threshold voltage of single-end- receiver of usb i/o buffer is set as within v il (max) = 0.8 [v], v ih (min) = 2.0 [v] (ttl input standard). there are some hystereses to lower noise sensitivity. (continued) parameter sym- bol pin name conditions value unit remarks min max input characteristics input high level voltage v ih udp, udm ? 2.0 v cc + 0.3 v *1 input low level voltage v il ? v ss ? 0.3 0.8 v *1 differential input sensitivity v di ? 0.2 ? v*2 differential common mode input voltage v cm ? 0.8 2.5 v *2 output characteristics output high level voltage v oh external pull-down resistance = 15 k 2.8 3.6 v *3 output low level voltage v ol external pull-up resistance = 1.5 k 0.0 0.3 v *3 crossover voltage v crs ? 1.3 2.0 v *4 rise time t fr ? 420ns*5 fall time t ff ? 420ns*5 rise/fall time matching t rfm ? 90 111.11 % *5 output impedance z drv ? 28 44 including rs = 27 input capacitance transceiver edge rate control capacitance c edge ?? 75 pf *6 series resistance r s ? 25 30 recommended value:27
mb91610 series ds07-16907-2e 95 *2 : use differential-receiver to receive usb differential data signal. differential-receiver has 200 [mv] of differential input sensitivity when the di fferential data input is within 0.8 [v] to 2.5 [v] to the local ground reference level. above voltage range is the common mode input voltage range. *3 : the output drive capability of the dr iver is below 0.3 [v] at low-state (v ol ) (to 3.6 [v] and 1.5 k load), and 2.8 [v] or above (to the v ss and 1.5 k load) at high-state (v oh ). *4 : the cross voltage of the exter nal differential output signal (d + /d ? ) of usb i/o buffer is within 1.3 [v] to 2.0 [v]. *5 : regarding t fr ,t ff , t rfm they indicate rise time (trise) and fall time (tfall) of the differential data signal. they are defined by the time between 10 % to 90 % of the output signal voltage. for full-speed buffer, t fr /t ff ratio is regulated as within 10% to minimize rfi emission. (continued) 1.0 [v] 0.2 [v] 0.8 [v] 2.5 [v] minimum differential input sensitivity [v] common mode input voltage [v] d+ d- max 2.0 [v] min 1.3 [v] v crs standard range 90% 90% 10% 10% v crs udp udm t fr t ff rise time fall time
mb91610 series 96 ds07-16907-2e (continued) *6 : the place to connect transceiv er edge rate control capacitance c edge for this usb i/o, it is recommended to use c edge control capacitor. for usb max standard as 75 pf, please control the edge characteristic of output waveform by connecting 30 [pf] to 50 [pf] (recommended value : 47 [pf] : = 50[pf]) to d + and d ? lines when implementing on the board. r s = 27 r s = 27 c edge + d - d 3-state c edge driver output impedance 3 to 19 rs serial resistance value 25 to 30 please apply 27 of serial resistance va lue as a recommended value.
mb91610 series ds07-16907-2e 97 8. flash memory write/erase characteristics (v cc = 3.3 v, ta = + 25 c) *1 : the chip erase time is the sector erase time multiplied across all sectors. *2 : this value comes from the technology qualification (using arrhenius equation to translate high temperature measurements into normalized value at + 85 c) . parameter value unit remarks min typ max sector erase time ? 0.9 3.6 s excludes write time prior to internal erase half word (16bits) write time ? 23 370 s not including system-level overhead time. chip erase time* 1 ? 10.8 43.2 s excludes write time prior to internal erase erase/write cycles 10000 ?? cycle average ta + 85 c flash memory data hold time 10* 2 ?? year average ta + 85 c
mb91610 series 98 ds07-16907-2e ordering information part number package MB91F610Apmc 120-pin plastic lqfp (fpt-120p-m21) mb91613pmc
mb91610 series ds07-16907-2e 99 package dimension please confirm the latest package dimension by following url. http://edevice.fujitsu.com/package/en-search/ 120-pin plastic lqfp lead pitch 0.50 mm p a ck age width pack age length 16.0 16.0 mm lead shape gullwing sealing method plastic mold mou nting height 1.70 mm max weight 0. 88 g 120-pin plastic lqfp (fpt-120p-m21) (fpt-120p-m21) c 2001-2008 fujits u microelectronics limited f120033s-c-3-4 1 30 60 31 90 61 120 91 16.000.10(.630.004)sq 18.000.20(.709.008)sq 0.50(.020) 0.220.05 (.009.002) m 0.08(.003) index .006 ?.001 +.002 ?0.03 +0.05 0.145 "a" 0.08(.003) lead no. .059 ?.004 +.008 ?0.10 +0.20 1.50 details of "a" part 0~8 (mounting height) 0.600.15 (.024.006) 0.25(.010) (.004.002) 0.100.05 (stand off) dimens ions in mm (inche s ). note: the v a l u e s in p a renthe s e s are reference v a l u e s .
mb91610 series 100 ds07-16907-2e main changes in this edition (continued) page section change results ?? changed the part number. (mb91f610 MB91F610A) added ?mb91613? to the part number. changed the terms. (usb function with mini-host usb function/ host) (mini-host host) 4 features changed the explanation of ? ? usb host?. (? support of bulk and interrupt transfer (only using endpoint1 and endpoint2) ? support control transfer, bulk transfer, interrupt transfer, and isochronous transfer) 7 pin assignment added the note *. 11 pin description changed ?i/o circuit ty pe? of the pins number 69, 70 and 71. (l f, l) 12 changed ?function? of the pin number 83 to 88, and 92 to 95. (added ?n.c. pin for mask products.?.) 21 i/o circuit type changed ?r emarks? of the type l. (added ? ? flash memory product only?.) 27 handling devices added ? ? osdc output pin?. 31 memory space 2.memory map corrected the table. (flash/rom flash) (added 000f 8000 h ) 39 i/o map corrected ?initial value after reset?. (fstr:-------0 -------1) 43 corrected ?block? for the line, 0000 0498 h to 0000 049c h . (changed to ?reserved?.) 64 electrical characteristics 1. absolute maximum ratings changed the notation of ?ratin g max? for ?input voltage?. (v ss + 4.0 v cc + 0.3 ( 4.0)) corrected ?remarks? for ?input voltage?. (5 v tolerant* 7 5 v tolerant) (usb i/o* 7 usb i/o) changed from ?power consumptio n? to ?power consumption (flash product)?. added ?power consumption (mask product)?. 65 corrected the description of *8. (deleted ? ? note that if the + b signal is input at power-on, since the power is supplied through the pin, the power supply voltage may become the voltage at which a power-on reset does not work.?.)
mb91610 series ds07-16907-2e 101 (continued) page section change results 67 electrical characteristics 3. dc characteristics (1) dc characteristics changed from ?power supply current? to ?power supply current (flash product)?. changed ?value? for i cco . (typ : 150 100 and 130 105) (max : 180 130) 68 added ?power supply current (mask product)?. 69 added pk0, pk1, init , md0, and md1 to ?pin name" for ??h? level input voltage (hysteresis input)?, and ??l? level input voltage (hys- teresis input)?. added pk0 and pk1 to ?pin name? for ??h? level output voltage?, and ??l? level output voltage?. 71 4. ac characteristics (1) main clock (mclk) input standard added the sentence, ?when crysta l oscillator is connected? to ?remarks? for ?input frequency?. added the sentence, ?when using external clock? to ?remarks? for ?input clock cycle?, and ?input clock pulse width?. 72 corrected ? ? operating guaranteed range (not using usb)?. (changed from ? ? operating guaranteed range? to ? ? operating guaranteed range (not using usb)?.) 73 corrected ? ? operating guaranteed range (at using usb)?. (added *1 to *4 to each value.) (changed from ?vms? to ?pms? for ? ? when the pll clock is se- lected?.) (added the note at the bottom of the page.) 74 (2) sub clock (sbclk) input standa rd added the column, ?remarks?. divided the line, ?input frequency? into two lines, ?when crystal oscillator is connected?, and ?when using external clock?. added ?input clock pulse width?, and ?input clock rise time and fall time?. corrected the table. (added ?< when external clock input>?.) (deleted ?x1? and ?x1a?.) 75 (3) conditions of pll changed from ?(3) pll oscillation stabilization wait time (lock up time)? to ?(3) conditions of pll?. added the column, ?typ? below ?value?. added ?pll input clock frequency?, ?pll multiple rate?, and ?pll macro oscillation clock frequency?. (5) reset input standards added ?reset input rise time and fall time?. added ?v ihs , t initxf , t initxr ? to the table. 89, 90 5. electrical characteristics for the a/d converter added ?compare time?. corrected the note, *1. (compare time: 0.73 s compare time: 0.72 s) added the note *3. 91, 92 corrected ? ? definition of 10-bit a/d converter terms?. (1lsb 1lsb')
mb91610 series 102 ds07-16907-2e (continued) the vertical lines marked in the left side of the page show the changes. page section change results 93 electrical characteristics 6. electrical characteristics for the analog rgb d/a converter corrected ?resolution?. deleted the description with * at the lower part of the table. 95 7. usb characteristics corrected the note, *3. (added ?at high-state (v oh )?.) 98 ordering information changed the part number. (mb91f610pmc MB91F610Apmc) added ?mb91613pmc? to the part number.
mb91610 series ds07-16907-2e 103 memo
mb91610 series fujitsu microelectronics limited shinjuku dai-ichi seimei bldg ., 7-1, nishishinjuku 2-chome, shinjuku-ku, tokyo 163-0722, japan tel: +81-3-5322-3329 http://jp.fujitsu.com/fml/en/ for further information please contact: north and south america fujitsu microelectronics america, inc. 1250 e. arques avenue, m/s 333 sunnyvale, ca 94085-5401, u.s.a. tel: +1-408-737-5600 fax: +1-408-737-5999 http://www.fma.fujitsu.com/ europe fujitsu microelectronics europe gmbh pittlerstrasse 47, 63225 langen, germany tel: +49-6103-690-0 fax: +49-6103-690-122 http://emea.fujitsu.com/microelectronics/ korea fujitsu microelectronics korea ltd. 206 kosmo tower building, 1002 daechi-dong, gangnam-gu, seoul 135-280, republic of korea tel: +82-2-3484-7100 fax: +82-2-3484-7111 http://kr.fujitsu.com/fmk/ asia pacific fujitsu microelectronics asia pte. ltd. 151 lorong chuan, #05-08 new tech park 556741 singapore tel : +65-6281-0770 fax : +65-6281-0220 http://www.fmal.fujitsu.com/ fujitsu microelectronics shanghai co., ltd. rm. 3102, bund center, no.222 yan an road (e), shanghai 200002, china tel : +86-21-6146-3688 fa x : +86-21-6335-1605 http://cn.fujitsu.com/fmc/ fujitsu microelectronics pacific asia ltd. 10/f., world commerce centre, 11 canton road, tsimshatsui, kowloon, hong kong tel : +852-2377-0226 fax : +852-2376-3269 http://cn.fujitsu.com/fmc/en/ specifications are subject to change without notice. for further information please contact each office. all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with sales representatives before ordering. the information, such as descriptions of f unction and application circuit examples, in this document are presented solely for t he purpose of reference to show examples of operations and uses of fujitsu microelectronics device; fujitsu microelectronics does not warrant proper operation of the device with respect to use based on such information. when you develop equipment incor porating the device based on such information, you must assume any re sponsibility arising out of such use of the information. fujitsu microelectronics assumes no liability for any damages whatsoever arising out of the use of the information. any information in this document, including descriptions of f unction and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of fujitsu microelectroni cs or any third party or does fujitsu microelectronics warrant non-i nfringement of any third-party's intellectual property right o r other right by using such information. fujitsu microelectronics assumes no liability for any infringement of the intellectual property rights or other rights of third parties which w ould result from the use of information contained herein. the products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and m anufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a ser ious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction con trol in nuclear facility, aircraft flight control, air tr affic control, mass transport control, me dical life support system, missile launch con trol in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). please note that fujitsu microelectronics will not be liable against you and/or any third party for any claims or damages arisi ng in connection with above-mentioned uses of the products. any semiconductor devices have an inherent chance of failure. you must protect against injury, damage or loss from such failure s by incorporating safety design measures into your facility and equi pment such as redundancy, fire protection, and prevention of ov er-current levels and other abnormal operating conditions. exportation/release of any products described in this document may require necessary procedures in accordance with the regulati ons of the foreign exchange and foreign trade control law of japan and/or us export control laws. the company names and brand names herein are the trademarks or registered trademarks of their respective owners. edited: sales promotion department

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